1. A method of simultaneously programming multiple blocks, comprising:

simultaneously executing programming operation on the corresponding multiple blocks according to a multiple block programming instruction sent by a user;

and respectively executing independent and continuous programming verification operations on the corresponding multi-block after the programming operation is executed, and selecting to continue to execute the programming operation according to a programming verification result until all the multi-blocks pass the programming verification.

2. The method of claim 1, further comprising, before the step of performing the program operation on the corresponding multiple blocks simultaneously according to the multiple block program command sent by the user, the step of:

acquiring a multi-block programming instruction sent by a user;

and executing a programming verification operation on the multi-block according to a multi-block programming instruction sent by the user.

3. The method of claim 2, wherein the step of performing program verify operations on the multi-block according to the multi-block programming instructions sent by the user comprises:

separate successive program verify operations are performed on the multiple blocks.

4. A method of simultaneously programming multiple blocks according to claim 3, wherein said step of performing separate successive program verify operations on said multiple blocks comprises:

dividing a time period according to the specific number of the multi-blocks, wherein the time period refers to the time required for executing the programming verification operation by a single block;

and sequentially performing programming verification on the multiple blocks according to the time period, wherein each block corresponds to one time period, and when one block performs programming verification, other blocks are in a waiting state.

5. The method of claim 1, wherein the step of performing the separate and consecutive program verify operations on the corresponding multi-blocks that have been programmed comprises:

dividing a time period according to the specific number of the multi-blocks, wherein the time period refers to the time required for executing programming verification singly;

and sequentially performing programming verification on the multiple blocks according to the time period, wherein each block corresponds to one time period, and when one block performs programming verification, other blocks are in a waiting state.

6. The method of claim 5, further comprising:

judging whether any block passes programming verification in advance;

if some blocks pass the program verification in advance, the blocks are excluded, and the waiting time period of the rest blocks in the program verification operation is adjusted in sequence, so that the program verification operation of the rest blocks becomes continuous.

7. The method of claim 1, further comprising:

when only the last block remains to perform the program operation or the program verify operation, the program operation and the program verify operation of the last block remain to be continuous.

8. An apparatus for simultaneously programming multiple blocks, comprising:

the first execution module is used for simultaneously executing the programming operation on the corresponding multi-block according to the multi-block programming instruction sent by the user;

and the second execution module is used for respectively executing independent and continuous programming verification operations on the corresponding multi-block after the programming operation is executed, and selecting to continue to execute the programming operation according to a programming verification result until all the multi-blocks pass the programming verification.

9. An electronic device comprising a processor and a memory, said memory storing computer readable instructions which, when executed by said processor, perform the steps of the method according to any one of claims 1 to 7.

10. A storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, performs the steps of the method according to any one of claims 1-7.

Background

One complete programming operation of NOR FLASH includes programming and program verification, and after a single programming operation is completed, if the program verification fails, the programming operation is followed by another programming operation, and the process is circulated until the program verification passes. The method includes the steps of programming a first circuit, verifying a second circuit, and programming a first data bus, wherein the first circuit is connected with the second circuit, and the second circuit is connected with the first data bus.

As shown in fig. 4, in the conventional programming method, when a user needs to program block 0 and block 1, the programming of block 1 can be started only after the programming algorithm of block 0 is finished. This results in the user needing to wait for block 0 to be programmed before operating block 1, which makes the overall programming inefficient.

In view of the above, there is a need to perform improvements.

Disclosure of Invention

An object of the embodiments of the present invention is to provide a method, an apparatus, an electronic device and a storage medium for simultaneously programming multiple blocks, which have the advantage of improving the overall programming efficiency.

In a first aspect, an embodiment of the present application provides a method for simultaneously programming multiple blocks, where the technical solution is as follows:

the method comprises the following steps:

simultaneously executing programming operation on the corresponding multiple blocks according to a multiple block programming instruction sent by a user;

and respectively executing independent and continuous programming verification operations on the corresponding multi-block after the programming operation is executed, and selecting to continue to execute the programming operation according to a programming verification result until all the multi-blocks pass the programming verification.

Further, in this embodiment of the present application, before the step of executing the program operation on the corresponding multiple blocks according to the multiple block program instruction sent by the user, the method further includes:

acquiring a multi-block programming instruction sent by a user;

and executing a programming verification operation on the multi-block according to a multi-block programming instruction sent by the user.

Further, in this embodiment of the present application, the step of performing a program verify operation on the multi-block according to a multi-block program instruction sent by the user includes:

separate successive program verify operations are performed on the multiple blocks.

Further, in the embodiment of the present application, the step of performing separate and consecutive program verify operations on the multiple blocks includes:

dividing a time period according to the specific number of the multi-blocks, wherein the time period refers to the time required for executing the programming verification operation by a single block;

and sequentially performing programming verification on the multiple blocks according to the time period, wherein each block corresponds to one time period, and when one block performs programming verification, other blocks are in a waiting state.

Further, in this embodiment of the present application, the step of performing separate and consecutive program verify operations on the corresponding multiple blocks on which the program operation is performed respectively includes:

dividing a time period according to the specific number of the multi-blocks, wherein the time period refers to the time required for executing programming verification singly;

and sequentially performing programming verification on the multiple blocks according to the time period, wherein each block corresponds to one time period, and when one block performs programming verification, other blocks are in a waiting state.

Further, in the embodiment of the present application, the method further includes:

judging whether any block passes programming verification in advance;

if some blocks pass the program verification in advance, the blocks are excluded, and the waiting time period of the rest blocks in the program verification operation is adjusted in sequence, so that the program verification operation of the rest blocks becomes continuous.

Further, in the embodiment of the present application, the method further includes:

when only the last block remains to perform the program operation or the program verify operation, the program operation and the program verify operation of the last block remain to be continuous.

In a second aspect, the present application also provides an apparatus for simultaneously programming multiple blocks, comprising:

the first execution module is used for simultaneously executing the programming operation on the corresponding multi-block according to the multi-block programming instruction sent by the user;

and the second execution module is used for respectively executing independent and continuous programming verification operations on the corresponding multi-block after the programming operation is executed, and selecting to continue to execute the programming operation according to a programming verification result until all the multi-blocks pass the programming verification.

In a third aspect, the present application further provides an electronic device, comprising a processor and a memory, where the memory stores computer readable instructions, and the computer readable instructions, when executed by the processor, perform the steps of the method as described above.

In a fourth aspect, the present application also provides a storage medium having a computer program stored thereon, which, when executed by a processor, performs the steps of the method as described above.

As can be seen from the above, the method and apparatus for simultaneously programming multiple blocks, the electronic device and the storage medium provided in the embodiments of the present application perform the programming operation on the corresponding multiple blocks simultaneously according to the multiple block programming instruction sent by the user; the multiple blocks corresponding to the executed programming operation are respectively executed with independent and continuous programming verification operations until the programming verification of all the blocks passes, and the scheme provided by the scheme has the beneficial effect of improving the overall programming efficiency.

Additional features and advantages of the present application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the embodiments of the present application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

Fig. 1 is a flowchart of a method for simultaneously programming multiple blocks according to an embodiment of the present disclosure.

Fig. 2 is a block diagram of a device for simultaneously programming multiple blocks according to an embodiment of the present disclosure.

Fig. 3 is a structural diagram of an electronic device according to an embodiment of the present application.

FIG. 4 is a diagram of multi-block programming versus time in a conventional programming approach.

FIG. 5 is a diagram of multi-block programming versus time in the present application.

In the figure: 210. a first acquisition module; 220. a first processing module; 300. an electronic device; 310. a processor; 320. a memory.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, no further definition or explanation thereof is required in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.

Referring to fig. 1 to 5, a method for simultaneously programming a plurality of blocks includes:

s110, simultaneously executing programming operation on corresponding multiple blocks according to a multiple-block programming instruction sent by a user;

and S120, respectively executing independent and continuous programming verification operations on the corresponding multiple blocks after the programming operation is executed, and selecting to continuously execute the programming operation according to the programming verification result until all the multiple blocks pass the programming verification.

After the program verification operation is executed, if the program verification is passed, the end state is entered, if the program verification is not passed, the program operation is continuously executed, then the program verification operation is executed, and the operation is circulated until the program verification is passed.

Specifically, after a user sends a multi-block programming instruction, the instruction is processed through a related logic circuit, then a corresponding control signal is generated, the control signal is sent to a corresponding analog circuit, after the multi-block programming instruction sent by the user is obtained, data needing to be programmed are sequentially sent to the corresponding blocks, then high voltage is applied to word lines of the corresponding blocks to execute programming operation at the same time, after the programming operation is executed, the related analog circuit generates the corresponding control signal to feed back to a digital circuit, then programming verification operation is sequentially executed on the multi-blocks, and then whether the programming operation needs to be executed again is judged according to a programming verification result.

Through the technical scheme, because the physical addresses of different blocks are different in the programming process, the programming operation can be simultaneously executed on different blocks, when the programming operation is simultaneously executed, high voltage is simultaneously applied to word lines of a plurality of blocks, the programming operation can be simultaneously executed, and after the programming operation is simultaneously executed, the programming verification operation is respectively executed on the plurality of blocks.

It should be noted that, in view of actual production cost, it is theoretically possible to perform the program verifying operation on multiple blocks simultaneously, but if the program verifying operation is performed on multiple blocks simultaneously, the SA circuit is required, which leads to a sharp increase in cost, and at the same time, because the programming contents of the multiple blocks are different, there is a difference in performing the program verifying operation, which greatly increases the complexity of the circuit structure, that is, performing the program verifying operation simultaneously is not cost-effective for actual production, and performing the program verifying operation simultaneously only requires applying a high voltage to word lines on the multiple blocks simultaneously, so that it is preferable to perform the program verifying operation on the multiple blocks separately, and because the time for the program verifying operation is longer than the time for the program verifying operation, in an actual product, the time for the program verifying operation is short, the multi-block method does not take much time to verify in blocks, so the whole programming time is shortened by simultaneously executing the programming operation and then respectively executing the programming verification operation.

Further, in some embodiments, before the step of executing the program operation on the corresponding multiple blocks simultaneously according to the multiple-block program instruction sent by the user, the method further includes:

acquiring a multi-block programming instruction sent by a user;

and executing the program verification operation on the multi-block according to the multi-block program command sent by the user.

Through the technical scheme, before the programming operation is executed, a multi-block programming instruction sent by a user needs to be acquired, after the instruction is received, a programming verification operation is executed on the multi-block to detect whether data on each block is the same as programming data, if the data on each block is the same as the programming data, the programming operation does not need to be executed, and if the data on each block is not the same as the programming data, the programming operation is executed again, so that unnecessary time waste caused by the same data in the programming process can be avoided, and the whole programming time is shortened.

Further, in some embodiments, the step of performing the program verify operation on the multi-block according to the multi-block program command sent by the user comprises:

separate successive program verify operations are performed on the multiple blocks.

Specifically, the time period is divided according to the specific number of the multiple blocks, and the time period refers to the time required for executing the program verification operation by a single block;

and sequentially performing programming verification on the multiple blocks according to the time period, wherein each block corresponds to one time period, and when one block performs programming verification, other blocks are in a waiting state.

Through the technical scheme, the multiple blocks are subjected to independent and continuous programming verification operation, the programming verification operation of the multiple blocks is performed alternately one by one, and when one block performs the programming verification, other blocks are in a waiting state, so that the programming verification operation can be performed stably and orderly at low cost, the programming operation is ensured to be performed simultaneously when the subsequent programming operation is performed on the multiple blocks, and the whole programming time is shortened.

Further, in some embodiments, the step of performing separate and consecutive program verify operations on the corresponding multiple blocks on which the program operation is performed respectively comprises:

dividing a time period according to the specific number of the multi-blocks, wherein the time period refers to the time required for executing the programming verification singly;

and sequentially performing programming verification on the multiple blocks according to the time period, wherein each block corresponds to one time period, and when one block performs programming verification, other blocks are in a waiting state until all the programming verifications are passed.

Through the technical scheme, after the programming operation is executed on the multiple blocks, the multiple blocks start to execute the programming verification operation, the single continuous programming verification operation is executed on the multiple blocks, the programming verification operation of the multiple blocks is performed alternately one by one, and when one block performs the programming verification, other blocks are in a waiting state, so that the programming verification operation can be performed stably and orderly at low cost, and meanwhile, the programming operation is ensured to be performed simultaneously when the subsequent programming operation is executed on the multiple blocks, and the whole programming time is shortened.

Specifically, referring to fig. 5, in some embodiments, when two blocks are required to be programmed, the two blocks are respectively block 0 and block 1, after a multi-block programming command sent by a user is obtained, a program verify operation is performed on block 0 in a time period from t0 to t1, after the program verify of block 0 is completed, a program verify operation is performed on block 1 in a time period from t1 to t2, after the program verify of block 1 is completed, if the program verify of both block 0 and block 1 is not passed, the program verify operation is performed on block 0 and block 1 simultaneously in a time period from t2 to t3, after the first program operation of block 0 and block 1 is completed, the program verify operation is performed on block 0/block 1 in a time period from t3 to t4, the program verify operation is performed on block 1/block 0 in a time period from t4 to t5, and the above operations are continuously cycled until the program verify of block 0 and block 1 passes.

Comparing fig. 4 and fig. 5, in the conventional programming method, the time length of t18 is required for completing the whole programming for block 0 and block 1, and under the same conditions, the time length of t14 is only required by using the scheme provided by the present application, and the saved time is t18-t 14.

It is noted that in practical products, the time required for the program operation is longer than the time for the program verify operation.

Further, in some of the embodiments, the method further comprises:

judging whether any block passes programming verification in advance;

if some blocks pass the programming verification in advance, the blocks are excluded, and the waiting time period of the rest blocks in the programming verification is adjusted in sequence, so that the programming verification of the rest blocks becomes continuous.

Through the technical scheme, when a plurality of blocks are programmed, if some blocks pass the programming verification in advance, the blocks are excluded, namely, when the rest blocks continue to execute the programming verification operation, a waiting time period can be removed, so that the whole programming efficiency can be further improved.

When only the last block remains to perform the program operation or the program verify operation, the program operation and the program verify operation of the last block remain to be continuous.

Specifically, in some embodiments, when two blocks need to be programmed, the two blocks are respectively block 0 and block 1, after a multi-block programming command sent by a user is obtained, a program verify operation is performed on block 0 in a time period from t0 to t1, after the program verify of block 0 is completed, a program verify operation is performed on block 1 in a time period from t1 to t2, after the program verify of block 1 is completed, if the program verify of block 0 and the program verify of block 1 do not pass, then the program verify operations are performed on block 0 and block 1 simultaneously in a time period from t2 to t3, after the first program operation of block 0 and block 1 is completed, the program verify operation is performed on block 0 in a time period from t3 to t4, the program verify operation is performed on block 1 in a time period from t4 to t5, if the program verify operation of block 1 passes this time from t4 to t5, then block 0 performs a program operation at t 5-t 6, a program verify operation at t 6-t 7, and a program operation at t 7-t 8.

In a second aspect, the present application further provides an apparatus comprising:

the first execution module is used for simultaneously executing the programming operation on the corresponding multi-block according to the multi-block programming instruction sent by the user;

and the second execution module is used for respectively executing independent and continuous programming verification operations on the corresponding multi-block after the programming operation is executed, and selecting to continue to execute the programming operation according to the programming verification result until all the multi-block passes the programming verification.

Through the technical scheme, as the physical addresses of different blocks are different in the programming process, the programming operation can be simultaneously executed on different blocks, the programming operation can be simultaneously executed on the corresponding multiple blocks according to the multiple-block programming instruction sent by a user through the first execution module, when the programming operation is simultaneously executed, high voltage is simultaneously applied to word lines of the multiple blocks, the programming operation can be simultaneously executed, after the programming operation is simultaneously executed, the second execution module respectively executes the programming verification operation on the multiple blocks, compared with the prior art that the programming, the programming verification, the programming and the programming verification are firstly executed on one block until the programming verification is passed, and then the related operation can be executed on the next block, the technical scheme of the application adopts a parallel programming and then block verification mode, the whole programming time can be effectively shortened

In a third aspect, the present application further provides an electronic device 300, which includes a processor 310 and a memory 320, where the memory 320 stores computer-readable instructions, and the steps in the above method are executed when the computer-readable instructions are executed by the processor 310.

By the above technical solution, the processor 310 and the memory 320 are interconnected and communicate with each other through a communication bus and/or other form of connection mechanism (not shown), and the memory 320 stores a computer program executable by the processor 310, and when the computing device runs, the processor 310 executes the computer program to execute the method in any optional implementation manner of the foregoing embodiment to implement the following functions: simultaneously executing programming operation on the corresponding multiple blocks according to a multiple block programming instruction sent by a user; and respectively executing independent and continuous programming verification operations on the corresponding multi-block after the programming operation is executed, and selecting to continue to execute the programming operation according to the programming verification result until all the multi-block passes the programming verification.

In a fourth aspect, the present application also provides a storage medium having a computer program stored thereon, which, when executed by a processor, performs the steps of the above method.

Through the technical scheme, when being executed by a processor, the computer program executes the method in any optional implementation manner of the embodiment to realize the following functions: simultaneously executing programming operation on the corresponding multiple blocks according to a multiple block programming instruction sent by a user; and respectively executing independent and continuous programming verification operations on the corresponding multi-block after the programming operation is executed, and selecting to continue to execute the programming operation according to the programming verification result until all the multi-block passes the programming verification.

The storage medium may be implemented by any type of volatile or nonvolatile storage device or combination thereof, such as a Static Random Access Memory (SRAM), an Electrically Erasable Programmable Read-Only Memory (EEPROM), an Erasable Programmable Read-Only Memory (EPROM), a Programmable Read-Only Memory (PROM), a Read-Only Memory (ROM), a magnetic Memory, a flash Memory, a magnetic disk, or an optical disk.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.

In addition, units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

Furthermore, the functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.