1. A PCB production line fault location method is characterized by comprising the following steps:

according to furnace error information of at least one element on a PCB output by a furnace AOI device, acquiring SPI error information corresponding to the element of the PCB from an SPI device, and acquiring furnace error information corresponding to the element of the PCB from a furnace AOI device;

generating an error rule record according to the furnace error information, the SPI error information and the furnace error information and a preset error generation rule;

classifying and counting each error rule record according to each fault type;

and when the statistical result of one fault type meets the corresponding determination standard of the fault type, determining the fault position according to the fault type, and outputting the fault position and the fault type.

2. The method of claim 1, wherein the post-furnace error information comprises a post-furnace error type, the SPI error information comprises an SPI error type, and the stokehole error information comprises a stokehole error type; generating a plurality of error rule records according to the furnace error information, the SPI error information and the furnace error information and a preset error generation rule comprises:

matching each after-furnace error type with each SPI error type according to a preset after-furnace-SPI error mapping rule;

if the matching is successful, generating an SPI error rule record according to the PCB, the element, the successfully matched after-furnace error type and the SPI error type;

and if the matching fails, matching each after-furnace error type with each before-furnace error type according to a preset after-furnace-before-furnace error mapping rule, if the matching is successful, generating an before-furnace error rule record according to the PCB, the element, the after-furnace error type successfully matched and the before-furnace error type, and if the matching fails, generating an after-furnace error rule record according to the after-furnace error type unsuccessfully matched in the PCB, the element and the after-furnace error information.

3. The method of claim 2, wherein the post-furnace fault types include at least one of offset, open solder, short solder, missing part, multiple solder, flipped part, reversed, shorted, missing part, side standing, and broken.

4. The method of any of claim 2, wherein each of the fault types corresponds to an error type combination, the error type combination comprising a first error type and a second error type, the first error type being the after-furnace error type, the second error type being the SPI error type, or the before-furnace error type, or being empty.

5. The method of claim 4, wherein classifying each error rule record by fault type comprises:

aiming at each fault type, acquiring an error type combination and a statistical mode corresponding to the fault type;

screening all error rule records according to the error type combination, and screening out all error rule records matched with the fault type;

and adopting the statistical mode to perform statistics on the screened error rule records.

6. The method according to claim 5, wherein the counting the screened error rule records by using the statistical method comprises:

counting the occurrence frequency of the fault type by taking the PCB as a unit for each screened error rule record; alternatively, the first and second electrodes may be,

recording the occurrence frequency of the fault types of the screened error rules based on the statistics of the same-position elements by taking the PCB as a unit; alternatively, the first and second electrodes may be,

recording the screened error rules, and counting the occurrence frequency of the fault types by taking a PCB (printed circuit board) as a unit based on the continuous occurrence situation of the same-position element; alternatively, the first and second electrodes may be,

acquiring station positions corresponding to elements in the screened error rule records, and counting the occurrence frequency of the fault types based on the same station position and taking a PCB (printed circuit board) as a unit for each screened error rule record; alternatively, the first and second electrodes may be,

acquiring station positions corresponding to elements in the screened error rule records, and counting the occurrence frequency of the fault types by taking a PCB (printed circuit board) as a unit based on the situation that the same station positions continuously appear for the screened error rule records; alternatively, the first and second electrodes may be,

and recording the number of the error components of the fault type on each PCB based on the number of the error components in each screened error rule.

7. The method of claim 6, wherein the statistical result of the fault types meeting the corresponding qualification criteria comprises:

the frequency of occurrence of the fault type reaches a frequency threshold in the qualification criteria, or,

the number of wrong elements of one PCB in each PCB corresponding to the fault type is greater than or equal to the upper limit threshold of the number of wrong elements in the identification standard, or,

and the number of wrong elements of one PCB in each PCB corresponding to the fault type is less than or equal to the lower limit threshold of the number of wrong elements in the identification standard.

8. The method of claim 4, further comprising:

and when the statistical result of one fault type meets the corresponding determination standard of the fault type, acquiring a corresponding improvement suggestion according to the fault type, and outputting the improvement suggestion.

9. A fault localization device, characterized in that the fault localization device comprises a processor and a memory, in which a computer program is stored which, when being executed by the processor, carries out the method according to any one of claims 1-8.

10. A readable storage medium, characterized in that the readable storage medium stores a computer program which, when executed by a processor, performs the method according to any one of claims 1-8.

Background

A complete PCB production line has a number of automation devices, the operating conditions of which directly affect the quality of the produced PCB. In the process of assembling the PCB, when a certain defect of the PCB is found to be generated, if the defective equipment can be quickly and accurately positioned, the method is favorable for improving the product quality and the automation level of a PCB production line.

In the prior art, the problem is generally located through a fault code of equipment, and for the problem of concealment, the problem is usually repaired by special maintenance personnel after the line is stopped, so that time and labor are wasted. As more and more equipment is used, problems are often more difficult to locate and normal operating conditions of the production line are also more and more difficult to maintain.

Disclosure of Invention

The embodiment of the invention aims to provide a method and equipment for positioning the fault of a PCB production line, which can quickly and accurately position the equipment with the fault, thereby improving the product quality and the automation level of the PCB production line.

In order to solve the above technical problems, embodiments of the present invention provide the following technical solutions:

according to an aspect of the present invention, there is provided a PCB production line fault location method, the method comprising:

according to furnace error information of at least one element on a PCB output by a furnace AOI device, acquiring SPI error information corresponding to the element of the PCB from an SPI device, and acquiring furnace error information corresponding to the element of the PCB from a furnace AOI device;

generating an error rule record according to the furnace error information, the SPI error information and the furnace error information and a preset error generation rule;

classifying and counting each error rule record according to each fault type;

and when the statistical result of one fault type meets the corresponding determination standard of the fault type, determining the fault position according to the fault type, and outputting the fault position and the fault type.

Optionally, the after-furnace error information includes an after-furnace error type, the SPI error information includes an SPI error type, and the before-furnace error information includes an before-furnace error type; generating a plurality of error rule records according to the furnace error information, the SPI error information and the furnace error information and a preset error generation rule comprises:

matching each after-furnace error type with each SPI error type according to a preset after-furnace-SPI error mapping rule;

if the matching is successful, generating an SPI error rule record according to the PCB, the element, the successfully matched after-furnace error type and the SPI error type;

and if the matching fails, matching each after-furnace error type with each before-furnace error type according to a preset after-furnace-before-furnace error mapping rule, if the matching is successful, generating an before-furnace error rule record according to the PCB, the element, the after-furnace error type successfully matched and the before-furnace error type, and if the matching fails, generating an after-furnace error rule record according to the after-furnace error type unsuccessfully matched in the PCB, the element and the after-furnace error information.

Optionally, the post-furnace fault type includes any one of offset, open solder, short solder, missing part, multiple solder, flipped part, reversed, shorted, mis-part, side standing, and broken.

Optionally, each fault type corresponds to an error type combination, where the error type combination includes a first error type and a second error type, the first error type is the after-furnace error type, and the second error type is the SPI error type, or the before-furnace error type, or is null.

Optionally, the performing classification statistics on each error rule record according to each fault type includes:

aiming at each fault type, acquiring an error type combination and a statistical mode corresponding to the fault type;

screening all error rule records according to the error type combination, and screening out all error rule records matched with the fault type;

and adopting the statistical mode to perform statistics on the screened error rule records.

Optionally, the counting the screened error rule records by using the statistical method includes:

counting the occurrence frequency of the fault type by taking the PCB as a unit for each screened error rule record; alternatively, the first and second electrodes may be,

recording each screened error rule, and counting the occurrence frequency of the fault type by taking a PCB (printed circuit board) as a unit based on a same-position element; alternatively, the first and second electrodes may be,

recording the screened error rules, and counting the occurrence frequency of the fault types by taking a PCB (printed circuit board) as a unit based on the continuous occurrence situation of the same-position element; alternatively, the first and second electrodes may be,

acquiring station positions corresponding to elements in the screened error rule records, and counting the occurrence frequency of the fault types based on the same station position and taking a PCB (printed circuit board) as a unit for each screened error rule record; alternatively, the first and second electrodes may be,

acquiring station positions corresponding to elements in the screened error rule records, and counting the occurrence frequency of the fault types by taking a PCB (printed circuit board) as a unit based on the situation that the same station positions continuously appear for the screened error rule records; alternatively, the first and second electrodes may be,

and recording the number of the error components of the fault type on each PCB based on the number of the error components in each screened error rule.

Optionally, the statistical result of the fault type meeting the corresponding qualification criteria includes:

the frequency of occurrence of the fault type reaches a frequency threshold in the qualification criteria, or,

the number of wrong elements of one PCB in each PCB corresponding to the fault type is greater than or equal to the upper limit threshold of the number of wrong elements in the identification standard, or,

and the number of wrong elements of one PCB in each PCB corresponding to the fault type is less than or equal to the lower limit threshold of the number of wrong elements in the identification standard.

Optionally, the method further comprises:

and when the statistical result of one fault type meets the corresponding determination standard of the fault type, acquiring a corresponding improvement suggestion according to the fault type, and outputting the improvement suggestion.

According to another aspect of the invention, there is provided a fault location device comprising a processor and a memory having stored therein a computer program which, when executed by the processor, implements the method of any of the above.

According to another aspect of the invention, there is provided a readable storage medium storing a computer program which, when executed by a processor, performs the method of any of the above.

The embodiment of the invention has the beneficial effects that: different from the situation of the prior art, in the embodiment of the invention, firstly, according to the oven error information of at least one element on a PCB output by the oven AOI equipment, the SPI error information and the oven error information corresponding to the element of the PCB are obtained from the SPI equipment and the oven AOI equipment; secondly, generating a plurality of error rule records according to the furnace error information, the SPI error information and the furnace error information and preset error generation rules; and finally, carrying out classified statistics on each error rule record according to each fault type, determining a fault position according to the fault type and outputting the fault position and the fault type when the statistical result of one fault type meets the corresponding determination standard of the fault type. By adopting the mode of the invention, the fault position and the fault type can be quickly and accurately positioned, thereby improving the product quality and improving the automation level of a PCB production line.

Drawings

FIG. 1 is a schematic structural diagram of a PCB production line fault location system according to an embodiment of the present invention;

FIG. 2 is a flow chart of a PCB production line fault location method provided by an embodiment of the invention;

FIG. 3 is a flowchart of a method for generating an error rule record according to an embodiment of the present invention;

FIG. 4 is a flowchart of a method for performing classification statistics on error rule records based on each fault type according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of possible fault types corresponding to post-furnace offset errors provided by embodiments of the present invention;

FIG. 6 is a schematic diagram of possible fault types corresponding to a post-furnace open weld error provided by an embodiment of the present invention;

FIG. 7 is a schematic diagram of possible fault types corresponding to a back-of-furnace missing piece error provided by an embodiment of the invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

Fig. 1 is a schematic structural diagram of a PCB production line fault location system according to an embodiment of the present invention. The system comprises a fault positioning device 10, a furnace back AOI (automatic Optical Inspection) device 20, a furnace front AOI device 30 and an SPI (Solder Paste Inspection) device 40, wherein the fault positioning device 10 is in communication connection with the furnace back AOI device 20, the furnace front AOI device 30 and the SPI device 40 respectively.

The main equipment on the PCB production line using SMT (Surface Mount Technology) includes a printer, a chip mounter, reflow soldering, a card inserter, a wave oven, and a test package. The manufacturing process of a PCB generally includes a plurality of chip mounters for respectively mounting different components.

And the SPI equipment 40 is used for detecting whether the problems of less tin, more tin, offset and the like exist in the tin paste printing of the printer.

And the stokehole AOI equipment 30 is used for detecting whether the adhered elements of the chip mounter have the problems of deviation, missing pieces, reversal and the like.

And the oven-rear AOI equipment 20 is used for detecting the solder paste problem and the chip mounting problem on the PCB which is finally produced.

The fault positioning device 10 is configured to obtain SPI error information corresponding to at least one component on a PCB from the SPI device 40 according to furnace error information of the at least one component on the PCB output by the furnace AOI device, obtain furnace error information corresponding to the component of the PCB from the furnace AOI device 30, and generate an error rule record according to the furnace error information, the SPI error information, and the furnace error information and according to a preset error generation rule; classifying and counting each error rule record according to each fault type; and when the statistical result of one fault type meets the corresponding determination standard, determining the fault position according to the fault type, and outputting the fault position and the fault type. The fault types include printing machine solder paste printing offset, steel mesh blockage, small steel mesh opening, chip mounter mounting coordinate offset, MARK point error identification and the like.

In some embodiments, each fault type corresponds to an improvement suggestion, and the fault location device 10 is further configured to obtain and output an improvement suggestion for the fault type, so that a corresponding engineer may adjust according to the improvement suggestion.

In some embodiments, the fault locating device 20 comprises a processor and a memory, the memory having stored therein a computer program which, when executed by the processor, implements the PCB production line fault locating method of any one of the following.

Fig. 2 is a flowchart of a method for locating a fault in a PCB production line according to an embodiment of the present invention, and the method can be applied to the fault locating apparatus 20. The method comprises the following steps:

step S201, according to the oven error information of at least one element on a PCB output by the oven AOI equipment, obtaining the SPI error information corresponding to the element of the PCB from the SPI equipment, and obtaining the oven error information corresponding to the element of the PCB from the oven AOI equipment.

Specifically, the oven-back AOI equipment detects each PCB after passing through the wave crest oven and outputs the oven-back test results of the PCBs. And when the furnace AOI equipment detects that the solder paste printing or the paster of each element on the PCB meets the standard, outputting a qualified furnace test result of the PCB. And when the AOI equipment detects that the PCB has the elements with wrong solder paste printing or surface mounting, outputting the unqualified elements on the PCB and the furnace error information corresponding to the elements. When the error information behind the furnace is monitored, backtracking is carried out according to the element, and the SPI error information and the error information in front of the furnace corresponding to the element are searched. It should be noted that the searched SPI error message and stokehole error message may be empty.

And step S202, generating an error rule record according to the furnace error information, the SPI error information and the furnace error information and a preset error generation rule.

The post-furnace error information of a component comprises at least one post-furnace error type, wherein the post-furnace error type comprises offset, open welding, short tin, missing piece, much tin, turning piece, reverse, short circuit, wrong piece, side standing, breakage and the like. The SPI error information for an element includes at least one SPI error type including offset, low tin, high tin, etc. The stokehole error information of a component comprises at least one stokehole error type, wherein the stokehole error type comprises offset, missing piece, turning piece, reverse, wrong piece, breakage and the like.

Step S202 is described in detail below with reference to fig. 3. As shown in fig. 3, a flowchart of a method for generating an error rule record according to an embodiment of the present invention is provided, where the method includes:

and step S2021, matching each post-furnace error type with each SPI error type according to a preset post-furnace-SPI error mapping rule.

Specifically, the after-furnace error information includes an after-furnace error type, the SPI error information includes an SPI error type, and the stokehole error information includes a stokehole error type. Suppose that the oven error information of an element comprises two oven error types of offset and open welding, and the SPI error information of the element comprises two SPI error types of offset and tin-less. According to the preset post-furnace-SPI error mapping rule, the mapping relation exists between the post-furnace offset and the SPI offset and between the post-furnace open welding and the SPI low tin, namely four mapping relations of the post-furnace offset-SPI offset, the post-furnace offset-SPI low tin, the post-furnace open welding-SPI offset and the post-furnace open welding-SPI low tin are obtained through matching.

In some embodiments, when the SPI error information is empty, go to step S2024.

Step S2022, determining whether the matching is successful, if so, going to step S2023, and if not, going to step S2024.

Specifically, when at least one mapping relationship that matches successfully exists in step S2021, it is determined that matching is successful.

And step S2023, generating an SPI error rule record according to the PCB, the element, the successfully matched after-furnace error type and the SPI error type.

Specifically, one SPI error rule record is generated for each mapping relationship that is successfully matched in step S2021.

And step S2024, matching each after-furnace error type with each before-furnace error type according to a preset after-furnace-before-furnace error mapping rule.

Specifically, it is assumed that the post-furnace error information of a component includes two types of post-furnace error types of offset and open welding, and the pre-furnace error information of the component includes one type of pre-furnace error type of offset. According to the preset mapping rule of the rear furnace and the front furnace error, the mapping relation exists between the rear furnace offset and the front furnace offset, and the mapping relation exists between the rear furnace open welding and the front furnace offset, namely the mapping relation of the rear furnace offset-the front furnace offset and the rear furnace open welding-the front furnace offset is obtained through matching.

In some embodiments, when the stokehole error information is empty, go to step S2027.

Step S2025, determining whether the matching is successful, if so, proceeding to step S2026, and if not, proceeding to step S2027.

Specifically, when at least one mapping relationship that matches successfully exists in step S2024, it is determined that matching is successful.

And step S2026, generating a furnace-front error rule record according to the PCB, the element, the successfully matched furnace-rear error type and the furnace-front error type.

Specifically, a stokehole error rule record is generated for each mapping relationship successfully matched in step S2024.

And step S2027, generating a post-furnace error rule record according to the post-furnace error type which fails to be matched in the PCB, the element and the post-furnace error information.

In some embodiments, the SPI error message and the stokehole error message for a component are both empty, i.e., the component failure occurs only after the furnace, and the possible fault type can be deduced from the post-furnace error type of the component. For example, if the rear furnace error type of an element is offset, and both the SPI error message and the front furnace error message are empty, the rear furnace offset of the element may be caused by poor tin-soldering. When the PCB passes through the wave crest furnace, if the single side of the element is poor in tin absorption, the wave crest furnace can drag the element, so that the back of the element furnace deviates.

It should be noted that, when generating the error rule record, one error rule record is generated for each post-furnace error type, or each post-furnace error type and each SPI error type, or each pre-furnace error type.

Step S203, the error rules are classified and counted according to the fault types.

Specifically, at least one fault type is preset in the fault positioning device, a mapping relation between the fault type and an error type combination is established for each fault type, and an error rule record matched with the fault type can be screened out according to the error type combination. The error type combination comprises a first error type and a second error type, wherein the first error type is a post-furnace error type, and the second error type is an SPI error type, or a pre-furnace error type, or null.

As can be seen from the foregoing description, each error rule record includes a post-fire error type, or includes a post-fire error type and either an SPI error type or a pre-fire error type. It should be noted that one error type combination may correspond to one or more fault types, and each fault type corresponds to one error type combination.

As shown in fig. 5, the "offset after furnace-SPI offset" error type combination corresponds to one fault type, i.e., "print offset", and the "offset after furnace-SPI tin-less" error type combination corresponds to two fault types, i.e., "steel mesh blocking" and "steel mesh opening small", respectively.

Step S203 is described in detail below with reference to fig. 4. As shown in fig. 4, a flowchart of a method for performing classification statistics on error rule records based on each fault type according to an embodiment of the present invention is provided, where the method includes:

step S2031, for each fault type, obtaining the error type combination and the statistical mode corresponding to the fault type.

Different fault types correspond to different error type combinations and statistical modes, some fault types are based on the whole PCB, such as a 'printing offset' fault type, the corresponding fault type is a printing machine offset, and when the printing machine is offset, printing of each element on the whole PCB is offset; and some fault types are based on the same position, for example, the same component continuously deviates, and a station for mounting the component can be found in the discharging surface through the component, so that the chip mounter with a problem is found.

Step S2032, screening each error rule record according to the error type combination, and screening each error rule record matched with the fault type.

Specifically, a first error type and a second error type can be obtained according to the error type combination, and each error rule record is screened according to the first error type and the second error type to obtain each error rule record matched with the fault type.

And S2033, counting the screened error rule records by adopting the counting mode.

According to the different fault types, the monitoring mode of each fault type is different, namely the statistical mode of each fault type is different. For example, the combination of the error type of "open welding after furnace-SPI with less tin" corresponds to three fault types (respectively, "too large scraper pressure", "steel mesh clogging", and "solder paste printing and demolding"), and the statistical modes corresponding to the three fault types are different. For the fault type of 'too large scraper pressure', whether a large area of defect exists on the PCB or not needs to be counted; for the fault type of 'steel mesh blockage', whether the element at the same position continuously generates the problem of 'welding after furnace-SPI (serial peripheral interface) less tin' needs to be counted; for the fault type of 'solder paste printing demoulding', the problem of 'welding after furnace-SPI less tin' of only partial elements on a PCB needs to be counted.

The inventor of the application analyzes various fault types to obtain the following six statistical modes:

(1) and recording each screened error rule, and counting the occurrence frequency of the fault type by taking the PCB as a unit.

(2) And recording each screened error rule, and counting the occurrence frequency of the fault type by taking the PCB as a unit based on a same-position element.

(3) And recording each screened error rule, and counting the occurrence frequency of the fault type by taking the PCB as a unit based on the continuous occurrence situation of the same-position element.

(4) And acquiring the station position corresponding to each element in each screened error rule record, and counting the occurrence frequency of the fault type based on the same station position and the PCB as a unit for each screened error rule record.

(5) And acquiring the station positions corresponding to the elements in the screened error rule records, and counting the occurrence frequency of the fault types by taking the PCB as a unit on the basis of the continuous occurrence situation of the same station positions of the screened error rule records.

(6) And recording the number of the error components of the fault type on each PCB based on the number of the error components in each screened error rule.

As shown in fig. 5, 6 and 7, the failure type "printing offset" corresponding to the error type combination "offset after furnace-SPI offset" can be counted in the (1) th mode; one of fault types corresponding to the combination of the error types of the ' lack of parts behind the furnace-lack of parts in front of the furnace ' throw materials with improper mounting height setting ' can be counted by adopting the mode (2); the fault type steel mesh blockage and the steel mesh small opening corresponding to the error type combination of the deflection after the furnace and the SPI less tin can be counted by adopting the mode (3); the method for counting the suction nozzle blockage or poor suction nozzle which is one of the fault types corresponding to the combination of the rear-furnace missing part and the front-furnace missing part can be carried out by adopting the method (4); incoming material oxidation which is one of fault types corresponding to the error type combination of 'open welding after furnace-empty' can be counted by adopting the mode (5); the fault type of 'too large scraper pressure' and 'tin paste printing demoulding' corresponding to the error type combination of 'after-furnace open welding-SPI less tin' can be counted by adopting the mode (6).

Step S204, when the statistical result of a fault type accords with the corresponding affirmation standard of the fault type, the fault position is determined according to the fault type, and the fault position and the fault type are output.

Specifically, the statistical result of each fault type is monitored, and whether the statistical result of each fault type meets the identification standard corresponding to the fault type is monitored.

In some embodiments, the statistical result of the fault type meeting the corresponding qualification criteria includes: the occurrence frequency of the fault type reaches a frequency threshold value in the standard, or the number of the error components of one PCB in the error component number set of the fault type is greater than or equal to an upper limit threshold value of the number of the error components in the standard, or the number of the error components of one PCB in each PCB corresponding to the fault type is less than or equal to a lower limit threshold value of the number of the error components in the standard.

It is to be understood that the frequency threshold, or the upper limit threshold of the number of faulty elements, or the lower limit threshold of the number of faulty elements in the qualification criteria corresponding to each fault type may be different.

When the fault type is caused by a defect of a non-co-location or co-station type (the co-location is the same element, and the co-station is the same patch device), the fault location can be directly determined according to the fault type, for example, if the fault type is "print offset", the fault location is a printer. The failure type is "machine mount offset", and the failure position is "component mount data table". When the fault type is caused by the defect of the same position or the same station type, the patch device corresponding to the element needs to be searched through the discharging table. Typically, one station corresponds to one placement device. For example, if the failure type is "machine mounting coordinate offset (same position continues)", the failure position is the die bonding device corresponding to the component having the offset.

In some embodiments, the method further comprises: and when the statistical result of one fault type meets the corresponding determination standard of the fault type, obtaining an improvement suggestion according to the fault type and outputting the improvement suggestion. For example, an improvement for the failure type "steel mesh clogging (same position continuous)" is suggested as "cleaning the steel mesh".

According to the method, firstly, according to the oven error information of at least one element on a PCB output by the oven AOI equipment, the SPI error information and/or the oven error information corresponding to the element of the PCB are/is obtained from the SPI equipment and the oven AOI equipment; secondly, generating a plurality of error rule records according to the furnace error information, the SPI error information and the furnace error information and preset error generation rules; and finally, carrying out classified statistics on each error rule record according to each fault type, determining a fault position according to the fault type and outputting the fault position and the fault type when the statistical result of one fault type meets the corresponding determination standard of the fault type. The method of the invention can quickly and accurately position the fault position and fault type, thereby improving the product quality and the automation level of the PCB production line.

According to an embodiment of the invention, a readable storage medium is provided, which stores a computer program which, when executed by a processor, performs the method steps of any of the embodiments of the invention.

Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a general hardware platform, and certainly can also be implemented by hardware. Based on such understanding, the technical solutions mentioned above may be embodied in the form of a software product, which may be stored in a readable storage medium, such as a ROM/RAM, a magnetic disk, an optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method according to the embodiments or some parts of the embodiments.

Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; within the idea of the invention, also technical features in the above embodiments or in different embodiments may be combined, steps may be implemented in any order, and there are many other variations of the different aspects of the invention as described above, which are not provided in detail for the sake of brevity; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.