1. A method for detecting a memory of a computer system independent of an operating system, comprising:

step 1, writing 0 in all data bits of all addresses in a preset address range in a computer memory at the initial starting stage of a computer system, reading back the 0-written addresses one by one, judging whether the read-back numerical value is consistent with 0, if so, executing step 2, otherwise, outputting a memory error as a detection result;

step 2, writing 1 to all data bits of all addresses in a preset address range in a computer memory, reading back the addresses written with 1 one by one, judging whether the read-back numerical value is consistent with 1, if so, executing step 3, otherwise, outputting a memory error as a detection result;

step 3, writing the original value of the current address to all data bits of all addresses in a preset address range in the memory of the computer, reading back the addresses written with the original values of the addresses one by one, judging whether the read-back numerical value is consistent with the corresponding address value, if so, executing step 4, otherwise, outputting the memory error as a detection result;

and 4, writing the numerical values of all data bits of all addresses in the preset address range in the computer memory after the current address is inverted bit by bit, reading back the addresses with the inverted numerical values one by one, judging whether the read-back numerical values are consistent with the corresponding address inverted values, if so, outputting the computer memory as a detection result, and otherwise, outputting the memory errors as the detection result.

2. The method as claimed in claim 1, further comprising obtaining a predetermined total number of cycles, wherein the total number of cycles is an even number, the initial number of cycles is 1 before the step 3, and determining whether the current number of cycles is less than the total number of cycles before the step 4 outputs the computer memory error-free as the detection result, if yes, executing the step 3 again while adding 1 to the number of cycles.

3. The method as claimed in claim 1 or 2, further comprising step 5, when the detection result is a memory error, determining the address line with the connection error in the memory according to the characteristic that the read-back values of the same consecutive bits of the address are inconsistent.

4. The method as claimed in claim 1 or 2, wherein the step 1 comprises: and writing the memory detection program into the computer memory through the JTAG equipment.

5. The method as claimed in claim 1 or 2, wherein the steps 1 to 4 are executed in a loop for a plurality of times to ensure the accuracy of the detection result.

6. A computer system memory detection system independent of an operating system, comprising:

the module 1 is used for writing 0 to all data bits of all addresses in a preset address range in a computer memory at the initial starting stage of a computer system, reading back the 0-written addresses one by one, judging whether the read-back numerical value is consistent with 0, if so, executing the module 2, and otherwise, outputting a memory error as a detection result;

the module 2 is used for writing 1 in all data bits of all addresses in a preset address range in a computer memory, reading back the addresses written with 1 one by one, judging whether the read-back numerical value is consistent with 1, if so, executing the module 3, and otherwise, outputting a memory error as a detection result;

a module 3, configured to write current original address values to all data bits of all addresses in a preset address range in a computer memory, read back addresses written with the original address values one by one, and determine whether the read-back values are consistent with the corresponding address values, if so, execute a module 4, otherwise, output a memory error as a detection result;

and the module 4 is used for writing the numerical values of all data bits of all addresses in the preset address range in the computer memory after the current address is inverted according to the bits, reading back the addresses with the inverted numerical values one by one, judging whether the read-back numerical values are consistent with the inverted values of the corresponding addresses, if so, outputting the computer memory without errors as a detection result, and otherwise, outputting the memory errors as the detection result.

7. The system as claimed in claim 1, further comprising a step of obtaining a predetermined total number of cycles, wherein the total number of cycles is an even number, the initial number of cycles is 1 before the module 3 starts, and the current number of cycles is determined to be less than the total number of cycles before the module 4 outputs the computer memory error-free result, and if yes, the module 3 is executed again while the number of cycles is increased by 1.

8. A computer system memory detection system independent of operating system as claimed in claim 1 or 2, further comprising a module 5 for determining the faulty address line in the memory according to the characteristic that the read-back values of the same consecutive bits of the address are inconsistent when the detection result is a memory fault.

9. An os-independent computer system memory detection system as claimed in claim 1 or 2, wherein the module 1 comprises: and writing the memory detection program into the computer memory through the JTAG equipment.

10. The os-independent computer system memory checker system of claim 1 or 2, wherein modules 1 through 4 are executed multiple times to ensure the accuracy of the check result.

Background

At present, memory devices such as SDRAM and DDR are often used as storage devices in computer systems. Therefore, the detection of the memory and the guarantee of the integrity of the memory play an important role in the development and debugging of the computer system. Most of the existing mature technologies are applied to memory detection application programs on the operating system level, and the memory problem cannot be normally detected under the condition that no operating system exists or the operating system cannot work. There is a need for a memory detection method that can be operating system independent. Most of the existing memory detection methods check whether the memory device has problems by writing some special values and reading back for comparison. The special values written by the method are usually 0x 5555555555 and 0xaaaaaaa, the method has obvious limitation, the short circuit problem of non-adjacent data lines cannot be detected, meanwhile, the method cannot detect the constant 0 and constant 1 problem of the address lines, and the condition of missed detection of the address which cannot be accessed in a given detection address range can exist. The detection method is not only inefficient but also has obvious defects, so a new memory detection method which can be independent of an operating system and has high performance and reliability is needed.

Disclosure of Invention

The technical problems to be solved by the present invention are two points, namely, the problem that the existing memory detection program cannot be applied to a bare computer environment independently of an operating system to completely detect the availability of the memory of a computer system, and unreliable factors such as low efficiency and detection blind spots of the existing memory detection method.

Aiming at the defects of the prior art, the invention provides a computer system memory detection method independent of an operating system, which comprises the following steps:

step 1, writing 0 in all data bits of all addresses in a preset address range in a computer memory at the initial starting stage of a computer system, reading back the 0-written addresses one by one, judging whether the read-back numerical value is consistent with 0, if so, executing step 2, otherwise, outputting a memory error as a detection result;

step 2, writing 1 to all data bits of all addresses in a preset address range in a computer memory, reading back the addresses written with 1 one by one, judging whether the read-back numerical value is consistent with 1, if so, executing step 3, otherwise, outputting a memory error as a detection result;

step 3, writing the original value of the current address to all data bits of all addresses in a preset address range in the memory of the computer, reading back the addresses written with the original values of the addresses one by one, judging whether the read-back numerical value is consistent with the corresponding address value, if so, executing step 4, otherwise, outputting the memory error as a detection result;

and 4, writing the numerical values of all data bits of all addresses in the preset address range in the computer memory after the current address is inverted bit by bit, reading back the addresses with the inverted numerical values one by one, judging whether the read-back numerical values are consistent with the corresponding address inverted values, if so, outputting the computer memory as a detection result, and otherwise, outputting the memory errors as the detection result.

The method for detecting the computer system memory independent of the operating system further comprises the steps of obtaining a preset cycle total, wherein the cycle total is an even number, the initial cycle time is 1 before the step 3 is started, judging whether the current cycle time is less than the cycle total before the step 4 outputs the computer memory as a detection result, and if so, executing the step 3 again and adding 1 to the cycle time.

The method for detecting the computer system memory independent of the operating system further comprises a step 5 of determining an address line with a connection error in the memory according to the characteristic that the read-back numerical values of the same continuous address bit are inconsistent when the detection result is a memory error.

The method for detecting the computer system memory independent of the operating system, wherein the step 1 comprises the following steps: and writing the memory detection program into the computer memory through the JTAG equipment.

The computer system memory detection method independent of the operating system, wherein the steps 1 to 4 are executed for a plurality of times in a circulating manner so as to ensure the accuracy of the detection result.

The invention also provides a computer system memory detection system independent of the operating system, which comprises:

the module 1 is used for writing 0 to all data bits of all addresses in a preset address range in a computer memory at the initial starting stage of a computer system, reading back the 0-written addresses one by one, judging whether the read-back numerical value is consistent with 0, if so, executing the module 2, and otherwise, outputting a memory error as a detection result;

the module 2 is used for writing 1 in all data bits of all addresses in a preset address range in a computer memory, reading back the addresses written with 1 one by one, judging whether the read-back numerical value is consistent with 1, if so, executing the module 3, and otherwise, outputting a memory error as a detection result;

a module 3, configured to write current original address values to all data bits of all addresses in a preset address range in a computer memory, read back addresses written with the original address values one by one, and determine whether the read-back values are consistent with the corresponding address values, if so, execute a module 4, otherwise, output a memory error as a detection result;

and the module 4 is used for writing the numerical values of all data bits of all addresses in the preset address range in the computer memory after the current address is inverted according to the bits, reading back the addresses with the inverted numerical values one by one, judging whether the read-back numerical values are consistent with the inverted values of the corresponding addresses, if so, outputting the computer memory without errors as a detection result, and otherwise, outputting the memory errors as the detection result.

The computer system memory detection system independent of the operating system further comprises a step of acquiring a preset cycle total, wherein the cycle total is an even number, the initial cycle number is 1 before the module 3 starts, whether the current cycle number is less than the cycle total is judged before the module 4 outputs the computer memory as a detection result, and if yes, the module 3 is executed again and the cycle number is added by 1.

The computer system memory detection system independent of the operating system further comprises a module 5, and when the detection result is a memory error, the address line with the connection error in the memory is determined according to the characteristic that the read-back values of the same continuous address bit are inconsistent.

The computer system memory detection system independent of the operating system, wherein the module 1 comprises: and writing the memory detection program into the computer memory through the JTAG equipment.

The computer system memory detection system independent of the operating system is characterized in that the modules 1 to 4 are executed for multiple times in a circulating mode so as to ensure the accuracy of detection results.

According to the scheme, the invention has the advantages that:

the memory detection method provided by the invention can be applied to the scene that a computer operating system cannot work or has no operating system, can quickly and accurately detect whether the memory equipment has the connection problem of the address line and the data line, and can detect the problems of constant 0, constant 1 and short circuit of the address line and the data line of the memory equipment.

Drawings

FIG. 1 is a general flow chart of the present invention;

FIG. 2 is a flowchart of a method for detecting a write 0 to a memory according to the present invention;

FIG. 3 is a flowchart of a method for detecting a write 1 to a memory according to the present invention;

FIG. 4 is a flowchart illustrating a method for detecting a memory write address value according to the present invention.

Detailed Description

The memory detection program is written into the memory of the computer system through JTAG (Joint Test Action group) equipment, so that the memory detection program can be operated at the initial starting stage of the computer system, namely, the execution of the solidified code segments of the computer system is finished, and the memory detection program is operated before the bootloader after the basic hardware is initialized; the memory is circularly detected for many times by three modes of writing 0 and 1 to the memory and writing the processed address value and reading back.

The write 0 detection of the memory comprises the following steps:

(1) writing 0 to all data bits of all addresses one by one in a specified address range;

(2) after all the addresses in the specified range are written, the written addresses are read back one by one;

(3) by comparing the read-back numerical value with 0, if the read-back numerical value is inconsistent with 0, the data line has a connection error, and if the same read-back numerical value is inconsistent in a plurality of continuous addresses, the address line with the connection error can be determined.

The method for detecting the write 1 of the memory comprises the following steps:

(1) writing 1 to all data bits of all addresses one by one in a designated address range (namely writing 0xffff _ fff _ ffff _ ffff for a 64-bit system and writing 0xffff _ ffff for a 32-bit system);

(2) after all the addresses in the specified range are written, the written addresses are read back one by one;

(3) by comparing the read-back numerical value with 1, if the read-back numerical value is inconsistent with 1, the data line has a connection error, and if the same read-back numerical value is inconsistent in a plurality of continuous addresses, the address line with the connection error can be determined.

The method for detecting the write address value of the internal memory comprises the following steps:

(1) in the appointed address range, writing all the addresses one by one in a cyclic sequence of a current address original value, a numerical value obtained by inverting the current address according to bits and the current address original value;

(2) after all the addresses in the specified range are written, the written addresses are read back one by one;

(3) comparing the numerical values written in the sequence with the numerical values read back, and if the numerical values are inconsistent, indicating that the address line has a connection error;

(4) the write address value detection method is separately tested for 16 times in a circulating mode, and the detection accuracy is guaranteed.

The multiple-cycle detection is to perform the 3 detection steps in a polling manner, and the number of times exceeds 2 times so as to ensure the accuracy and the rigor of the detection result.

In order to make the aforementioned features and effects of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.

As shown in fig. 1, the memory detection method provided by the present invention includes three steps, which are respectively as follows:

memory write 0 detection:

as shown in fig. 2, a write 0 operation is performed on all addresses one by one within a given address range. After all the addresses are written, reading back one by one from the initial address, comparing the read-back value with the value 0, and if the comparison result is inconsistent, indicating that a data line connection error exists; and if the results are consistent, entering the next detection.

(II) memory write 1 detection:

as shown in FIG. 3, a write 1 operation is performed on all addresses one by one within a given address range. After all the addresses are written, reading back one by one from the initial address, comparing the read-back value with the value 1, and if the comparison result is inconsistent, indicating that a data line connection error exists; if the results are consistent, the data line is free of connection problems.

And (III) detecting the write address value of the memory:

as shown in fig. 4, in a given address range, all addresses are written in the order of the current address value, the current address value inverted by bits, and the current address value. After all the addresses are written, reading back one by one from the initial address, comparing the read-back numerical value with the written numerical value, and if the results are inconsistent, indicating that an address line connection error exists; if the result is correct, the address value detection is circularly written, and if the times are more than 16, the detection is finished, which indicates that the address line has no connection problem.

The method comprises the steps that firstly, even number of detection times (odd number of writing sequence: original address value, original address value negation, original address value, even number of writing sequence: original address value negation, original address value negation) are needed for detecting the writing address value, in order to fully verify the correctness of the address line of the memory device, multiple times of verification are needed, 16 times of detection are specified, the address line is correct after 16 times of detection, and the address line can be considered to have no connection error.

The following describes in detail how the memory detection method of the present invention detects the connection between the data line and the address line. An example of SDRAM in a computer system environment having address lines, data lines, and a range of memory addresses that are addressed by the computer system is illustrated. When the memory detection is utilized, firstly, a0 writing test is carried out, namely, 0 is written one by one from an SDRAM starting address to an SDRAM ending address, and then, 0 is read back one by one from the SDRAM starting address to the SDRAM ending address after the writing is finished and is compared with 0, wherein if a certain data line has a constant 1 condition, the value after the reading back is possible to have 0x 100010001000100010001000 or other positions constant 1, and the reading back result is inconsistent with 0, the data line has a connection error, and the data line with a specific problem can be known by analyzing the value read back; if the read-back numerical value is consistent with 0, performing next item write 1 detection, similarly writing 1 one by one from the SDRAM starting address to the SDRAM ending address (the 1 here represents that the data line is completely written to 1, namely a 64-bit system writes 0 xfffff _ ffff _ ffff _ ffff, and a 32-bit system writes 0 xfffff _ ffff), after all the addresses are written, reading back one by one from the SDRAM starting address to the SDRAM ending address and comparing the read-back and the written-in values, wherein if a certain data line of the SDRAM in the 64-bit system has a constant 0 condition, the read-back numerical value will have 0xefff _ efff _ efff or other bits have a constant 0, and is inconsistent with the written-in value, indicating that the data line has a connection problem, and knowing the data line with the problem by analyzing the read-back numerical value; if the data line is consistent with the written value, whether the data line has the connection problem can be judged through the two detection steps. Entering the next write address value test, performing write operation one by one from the initial address of the SDRAM to the end address of the SDRAM according to the original address value, the inverted address value and the original address value sequence, after all the addresses are written, reading back from the initial address and comparing with the written value, if the read values are inconsistent, it is indicated that the connection of the address lines has problems, for example, in the following, when the value of the read address 0x80008000 is read, it is found that the read back value is 0x8000f000 and the written value is different, when the value of the read address 0x8000a000 is read, it is found that the read back value is 0x7fff0fff and the written value is different, and when the value of the read address 0x8000f000 is read, it is found that the read back value is 0x8000f000, it is indicated that the connection of the address lines is wrong, and the constant 0 problem can occur through the analysis result; if the read-back values of all the addresses are consistent with the written values, the test is performed in a circulating mode again, the circulation is performed after more than 16 times, and if no problem exists, the problem of connection of the address lines is indicated. Therefore, the memory detection method provided by the invention is very helpful for detecting and eliminating the connection problems of the data line and the address line of the memory device, wherein the data line and the address line are constant 0 and constant 1.

The following are system examples corresponding to the above method examples, and this embodiment can be implemented in cooperation with the above embodiments. The related technical details mentioned in the above embodiments are still valid in this embodiment, and are not described herein again in order to reduce repetition. Accordingly, the related-art details mentioned in the present embodiment can also be applied to the above-described embodiments.

The invention also provides a computer system memory detection system independent of the operating system, which comprises:

the module 1 is used for writing 0 to all data bits of all addresses in a preset address range in a computer memory at the initial starting stage of a computer system, reading back the 0-written addresses one by one, judging whether the read-back numerical value is consistent with 0, if so, executing the module 2, and otherwise, outputting a memory error as a detection result;

the module 2 is used for writing 1 in all data bits of all addresses in a preset address range in a computer memory, reading back the addresses written with 1 one by one, judging whether the read-back numerical value is consistent with 1, if so, executing the module 3, and otherwise, outputting a memory error as a detection result;

a module 3, configured to write current original address values to all data bits of all addresses in a preset address range in a computer memory, read back addresses written with the original address values one by one, and determine whether the read-back values are consistent with the corresponding address values, if so, execute a module 4, otherwise, output a memory error as a detection result;

and the module 4 is used for writing the numerical values of all data bits of all addresses in the preset address range in the computer memory after the current address is inverted according to the bits, reading back the addresses with the inverted numerical values one by one, judging whether the read-back numerical values are consistent with the inverted values of the corresponding addresses, if so, outputting the computer memory without errors as a detection result, and otherwise, outputting the memory errors as the detection result.

The computer system memory detection system independent of the operating system further comprises a step of acquiring a preset cycle total, wherein the cycle total is an even number, the initial cycle number is 1 before the module 3 starts, whether the current cycle number is less than the cycle total is judged before the module 4 outputs the computer memory as a detection result, and if yes, the module 3 is executed again and the cycle number is added by 1.

The computer system memory detection system independent of the operating system further comprises a module 5, and when the detection result is a memory error, the address line with the connection error in the memory is determined according to the characteristic that the read-back values of the same continuous address bit are inconsistent.

The computer system memory detection system independent of the operating system, wherein the module 1 comprises: and writing the memory detection program into the computer memory through the JTAG equipment.

The computer system memory detection system independent of the operating system is characterized in that the modules 1 to 4 are executed for multiple times in a circulating mode so as to ensure the accuracy of detection results.