1. The utility model provides a TFT array substrate, includes many scanning lines (1), many data lines (2) and by many scanning lines (1) with many data lines (2) insulating crossing define a plurality of pixel (P) that form, characterized in that, be equipped with two pixel electrode (3) in every pixel (P), two pixel electrode (3) are followed the extending direction of scanning line (1) is arranged and is set up, and every pixel electrode (3) link to each other rather than adjacent scanning line (1) and data line (2) through two thin film transistor (4), two thin film transistor (4) all link to each other with same scanning line (1) and same data line (2), two thin film transistor (4) can charge corresponding pixel electrode (3) simultaneously when opening.

2. The TFT array substrate according to claim 1, wherein in each pixel unit (P), one of the two pixel electrodes (3) is connected to the scan line (1) above the pixel electrode, the other is connected to the scan line (1) below the pixel electrode, and the two pixel electrodes (3) are connected to the data line (2) on the same side; the pixel electrodes (3) in the pixel units (P) in the same row are all connected with the data line (2) on the same side, in every two adjacent rows of pixel units (P), the pixel electrodes (3) in the pixel units (P) on the upper row are all connected with the data line (2) on one side, and the pixel electrodes (3) in the pixel units (P) on the lower row are all connected with the data line (2) on the other side.

3. A driving method applied to the TFT array substrate according to any one of claims 1 or 2, wherein each pixel unit (P) includes a first pixel electrode (31) and a second pixel electrode (32), the plurality of scan lines (1) include a first scan line (11) and a second scan line (12), the first scan line (11) and the second scan line (12) are respectively located at upper and lower sides of the first pixel electrode (31) and the second pixel electrode (32), the plurality of data lines (2) include a first data line (21) located at one side of the first pixel electrode (31) and the second pixel electrode (32), the first pixel electrode (31) is connected to the first data line (21) and the first scan line (11) through a first thin film transistor (41) and a second thin film transistor (42), the second pixel electrode (32) is connected to the first data line (21) and the second scan line (12) through a third thin film transistor (43) and a fourth thin film transistor (44), and the driving method includes:

inputting a first level signal to the first scan line (11) to turn on the first thin film transistor (41) and the second thin film transistor (42), the first data line (21) simultaneously charging the first pixel electrode (31) through the first thin film transistor (41) and the second thin film transistor (42);

inputting a second level signal to the first scan line (11) to turn off the first thin film transistor (41) and the second thin film transistor (42), inputting a first level signal to the second scan line (12) to turn on the third thin film transistor (43) and the fourth thin film transistor (44), and the first data line (21) simultaneously charges the second pixel electrode (32) through the third thin film transistor (43) and the fourth thin film transistor (44).

4. A driving method according to claim 3, wherein the first pixel electrode (31) is disposed adjacent to the first data line (21), the source electrode (431) of the third thin film transistor (43) is connected to the source electrode (441) of the fourth thin film transistor (44) and then connected to the first data line (21) through the source electrode (441) of the fourth thin film transistor (44), and the drain electrode (432) of the third thin film transistor (43) is formed by extending and protruding the drain electrode (442) of the fourth thin film transistor (44).

5. The TFT array substrate is characterized by comprising a plurality of scanning lines (1), a plurality of data lines (2) and a plurality of charging lines (5), wherein each charging line (5) is positioned between two adjacent data lines (2), the plurality of scanning lines (1), the plurality of data lines (2) and the plurality of charging lines (5) are insulated and crossed to form a plurality of pixel units (P), and each pixel unit (P) is internally provided with one pixel electrode (3); two pixel units (P) between two adjacent data lines (2) are taken as a group along the extending direction of the scanning line (1), two data lines (2) are arranged between every two adjacent groups of pixel units (P), a charging line (5) is arranged between the two pixel units (P) in each group of pixel units (P), and two ends of each charging line (5) are respectively connected with the two adjacent data lines (2); every pixel electrode (3) all links to each other through two thin film transistor (4) and its adjacent scanning line (1), data line (2) and charging wire (5), two thin film transistor (4) all link to each other with same scanning line (1), one of them in two thin film transistor (4) links to each other with adjacent scanning line (1), and the other links to each other with adjacent charging wire (5), two thin film transistor (4) can charge corresponding pixel electrode (3) simultaneously when opening.

6. The TFT array substrate according to claim 5, wherein two pixel electrodes (3) are disposed in each group of pixel units (P), the two pixel electrodes (3) are arranged along the extending direction of the scan lines (1), the pixel electrode (3) on the left side is connected with the data line (2) on the left side and the adjacent charge line (5), the pixel electrode (3) on the right side is connected with the data line (2) on the right side and the adjacent charge line (5), one of the two pixel electrodes (3) is connected with the scan line (1) above the pixel electrode, and the other is connected with the scan line (1) below the pixel electrode.

7. A driving method applied to the TFT array substrate according to any one of claims 5 or 6, wherein each group of pixel cells (P) comprises a first pixel electrode (31) and a second pixel electrode (32), the plurality of scan lines (1) comprises a first scan line (11) and a second scan line (12), the first scan line (11) and the second scan line (12) are respectively located at upper and lower sides of the first pixel electrode (31) and the second pixel electrode (32), the plurality of data lines (2) comprises a first data line (21) and a second data line (22), the first data line (21) and the second data line (22) are respectively located at left and right sides of the first pixel electrode (31) and the second pixel electrode (32), the plurality of charge lines (5) comprises a first charge line (51) located between the first pixel electrode (31) and the second pixel electrode (32), both ends of the first charging line (51) are respectively connected with the first data line (21) and the second data line (22); the first pixel electrode (31) is connected to the first data line (21) and the first scan line (11) through a first thin film transistor (41), the first pixel electrode (31) is further connected to the first charging line (51) and the first scan line (11) through a second thin film transistor (42), the second pixel electrode (32) is connected to the second data line (22) and the second scan line (12) through a third thin film transistor (43), the second pixel electrode (32) is further connected to the first charging line (51) and the second scan line (12) through a fourth thin film transistor (44), and the driving method includes:

inputting a first level signal to the first scan line (11) to turn on the first thin film transistor (41) and the second thin film transistor (42), the first data line (21) and the first charging line (51) simultaneously charging the first pixel electrode (31) through the first thin film transistor (41) and the second thin film transistor (42), respectively;

inputting a second level signal to the first scan line (11) to turn off the first thin film transistor (41) and the second thin film transistor (42), inputting a first level signal to the second scan line (12) to turn on the third thin film transistor (43) and the fourth thin film transistor (44), and simultaneously charging the second pixel electrode (32) through the third thin film transistor (43) and the fourth thin film transistor (44) by the second data line (22) and the first charging line (51), respectively.

8. The TFT array substrate is characterized by comprising a plurality of scanning lines (1), a plurality of data lines (2) and a plurality of charging wires (5), wherein one charging wire (5) is respectively arranged at the left side and the right side of each data line (2), the plurality of scanning lines (1), the plurality of data lines (2) and the plurality of charging wires (5) are insulated, crossed and limited to form a plurality of pixel units (P), and a pixel electrode (3) is arranged in each pixel unit (P); two pixel units (P) between two adjacent charging wires (5) are taken as a group along the extending direction of the scanning line (1), two charging wires (5) are arranged between every two adjacent groups of pixel units (P), a data line (2) is arranged between every two pixel units (P) in each group of pixel units (P), and two ends of each charging wire (5) are respectively connected with one adjacent data line (2); every pixel electrode (3) all links to each other through two thin film transistor (4) and its adjacent scanning line (1), data line (2) and charging wire (5), two thin film transistor (4) all link to each other with same scanning line (1), one of them in two thin film transistor (4) links to each other with adjacent scanning line (1), and the other links to each other with adjacent charging wire (5), two thin film transistor (4) can charge corresponding pixel electrode (3) simultaneously when opening.

9. The TFT array substrate according to claim 8, wherein two pixel electrodes (3) are disposed in each group of pixel units (P), the two pixel electrodes (3) are arranged in a direction along which the scan lines (1) extend, the pixel electrode (3) on the left side is connected to the charge line (5) on the left side and the adjacent data line (2), the pixel electrode (3) on the right side is connected to the charge line (5) on the right side and the adjacent data line (2), one of the two pixel electrodes (3) is connected to the scan line (1) above the charge line, and the other is connected to the scan line (1) below the charge line.

10. A driving method applied to the TFT array substrate according to any one of claims 8 or 9, wherein each group of pixel units (P) includes a first pixel electrode (31) and a second pixel electrode (32), the plurality of scan lines (1) include a first scan line (11) and a second scan line (12), the first scan line (11) and the second scan line (12) are respectively located at upper and lower sides of the first pixel electrode (31) and the second pixel electrode (32), the plurality of charging lines (5) include a first charging line (51) and a second charging line (52), the first charging line (51) and the second charging line (52) are respectively located at left and right sides of the first pixel electrode (31) and the second pixel electrode (32), the plurality of data lines (2) include a first data line (21) located between the first pixel electrode (31) and the second pixel electrode (32), both ends of the first charging line (51) and both ends of the second charging line (52) are respectively connected with the first data line (21); the first pixel electrode (31) is connected to the first charging line (51) and the first scan line (11) through a first thin film transistor (41), the first pixel electrode (31) is further connected to the first data line (21) and the first scan line (11) through a second thin film transistor (42), the second pixel electrode (32) is connected to the second charging line (52) and the second scan line (12) through a third thin film transistor (43), the second pixel electrode (32) is further connected to the first data line (21) and the second scan line (12) through a fourth thin film transistor (44), and the driving method includes:

inputting a first level signal to the first scan line (11) to turn on the first thin film transistor (41) and the second thin film transistor (42), the first charging line (51) and the first data line (21) simultaneously charging the first pixel electrode (31) through the first thin film transistor (41) and the second thin film transistor (42), respectively;

inputting a second level signal to the first scan line (11) to turn off the first thin film transistor (41) and the second thin film transistor (42), inputting a first level signal to the second scan line (12) to turn on the third thin film transistor (43) and the fourth thin film transistor (44), and simultaneously charging the second pixel electrode (32) through the third thin film transistor (43) and the fourth thin film transistor (44) by the second charging line (52) and the first data line (21), respectively.

Background

With the development of Display technology, Liquid Crystal Display (LCD) panels are becoming more popular because of their advantages of portability, low radiation, etc. The liquid crystal display panel comprises a color film substrate (CF), an array substrate (TFT array substrate) and a liquid crystal layer (LC layer) sandwiched therebetween, wherein the color film substrate and the array substrate are opposite to each other, a plurality of pixel units (pixel) are disposed on the array substrate and distributed in an array manner, a pixel electrode is disposed in each pixel unit, and each pixel electrode is connected to a corresponding scan line and a corresponding data line through a TFT (thin film transistor).

As the resolution requirements of the liquid crystal display panel are increased, the resolution of the display panel is generally increased by decreasing the size of the pixels to increase the number of pixels (PPI, pixelppench). When the size of the pixel is designed to be smaller, the size of the TFT also needs to be designed to be smaller correspondingly, and if the W/L (i.e. width/length) value of the TFT is designed to be larger (i.e. the size of the TFT is larger), the aperture ratio of the pixel unit is insufficient; if the W/L value of the TFT is designed to be small, the pixel unit will be insufficiently charged, which will affect the display effect. Therefore, a novel pixel structure is needed to be designed, which can ensure the aperture opening ratio of the pixel unit and avoid the insufficient charging of the pixel unit.

Disclosure of Invention

The invention aims to provide a TFT array substrate and a driving method thereof, and aims to solve the defects in the prior art, and the pixel electrodes are charged simultaneously through two thin film transistors, so that the insufficient charging of the pixel electrodes is avoided, and meanwhile, the sizes of the thin film transistors can be reduced appropriately to improve the aperture opening ratio.

A first embodiment of the present invention provides a TFT array substrate, which includes a plurality of scan lines, a plurality of data lines, and a plurality of pixel units defined by the scan lines and the data lines in an insulated and crossed manner, wherein each pixel unit is provided with two pixel electrodes, the two pixel electrodes are arranged along an extending direction of the scan lines, each pixel electrode is connected to its adjacent scan line and data line through two thin film transistors, the two thin film transistors are both connected to the same scan line and the same data line, and the two thin film transistors can charge corresponding pixel electrodes simultaneously when turned on.

Furthermore, in each pixel unit, one of the two pixel electrodes is connected to the scan line above the pixel electrode, the other is connected to the scan line below the pixel electrode, and both the two pixel electrodes are connected to the data line on the same side.

Furthermore, the pixel electrodes in the pixel units in the same row are all connected with the data line on the same side, and in every two adjacent rows of pixel units, the pixel electrodes in the pixel units in the previous row are all connected with the data line on one side, and the pixel electrodes in the pixel units in the next row are all connected with the data line on the other side.

The first embodiment of the present invention further provides a driving method, which is applied to the TFT array substrate. Each pixel unit includes a first pixel electrode and a second pixel electrode, the first pixel electrode and the second pixel electrode are arranged along an extending direction of the scan line, the scan lines include a first scan line and a second scan line, the first scan line and the second scan line are respectively located at upper and lower sides of the first pixel electrode and the second pixel electrode, the data lines include a first data line located at one side of the first pixel electrode and the second pixel electrode, the first pixel electrode is connected with the first data line and the first scan line through a first thin film transistor and a second thin film transistor, the second pixel electrode is connected with the first data line and the second scan line through a third thin film transistor and a fourth thin film transistor, and the driving method includes:

inputting a first level signal to the first scan line to turn on the first thin film transistor and the second thin film transistor, the first data line simultaneously charging the first pixel electrode through the first thin film transistor and the second thin film transistor;

inputting a second level signal to the first scan line to turn off the first thin film transistor and the second thin film transistor, inputting a first level signal to the second scan line to turn on the third thin film transistor and the fourth thin film transistor, and simultaneously charging the second pixel electrode with the first data line through the third thin film transistor and the fourth thin film transistor.

Furthermore, the first pixel electrode is disposed close to the first data line, the source of the third thin film transistor is connected to the source of the fourth thin film transistor, and then connected to the first data line through the source of the fourth thin film transistor, and the drain of the third thin film transistor is formed by extending and protruding the drain of the fourth thin film transistor.

A second embodiment of the present invention provides a TFT array substrate, which includes a plurality of scan lines, a plurality of data lines, and a plurality of charging lines, wherein each charging line is located between two adjacent data lines, the plurality of scan lines, the plurality of data lines, and the plurality of charging lines are defined in an insulating and intersecting manner to form a plurality of pixel units, and each pixel unit is provided with a pixel electrode; two pixel units between two adjacent data lines are taken as a group along the extending direction of the scanning lines, two data lines are arranged between every two adjacent groups of pixel units, a charging line is arranged between two pixel units in each group of pixel units, and two ends of each charging line are respectively connected with the two adjacent data lines; each pixel electrode is connected with the adjacent scanning line, the data line and the charging line through two thin film transistors, the two thin film transistors are connected with the same scanning line, one of the two thin film transistors is connected with the adjacent scanning line, the other one of the two thin film transistors is connected with the adjacent charging line, and the two thin film transistors can charge the corresponding pixel electrodes simultaneously when being turned on.

Furthermore, two pixel electrodes are arranged in each group of pixel units, the two pixel electrodes are arranged along the extending direction of the scanning lines, the pixel electrode positioned on the left side is connected with the data line on the left side and the adjacent charging line, the pixel electrode positioned on the right side is connected with the data line on the right side and the adjacent charging line, one of the two pixel electrodes is connected with the scanning line above the two pixel electrodes, and the other pixel electrode is connected with the scanning line below the two pixel electrodes.

The second embodiment of the present invention further provides a driving method, which is applied to the TFT array substrate. Each group of pixel units comprises a first pixel electrode and a second pixel electrode, the first pixel electrode and the second pixel electrode are arranged along the extending direction of the scanning lines, the scanning lines comprise a first scanning line and a second scanning line, the first scanning line and the second scanning line are respectively located at the upper side and the lower side of the first pixel electrode and the second pixel electrode, the data lines comprise a first data line and a second data line, the first data line and the second data line are respectively located at the left side and the right side of the first pixel electrode and the second pixel electrode, the charging lines comprise a first charging line located between the first pixel electrode and the second pixel electrode, and two ends of the first charging line are respectively connected with the first data line and the second data line; the first pixel electrode is connected with the first data line and the first scanning line through a first thin film transistor, the first pixel electrode is further connected with the first charging line and the first scanning line through a second thin film transistor, the second pixel electrode is connected with the second data line and the second scanning line through a third thin film transistor, and the second pixel electrode is further connected with the first charging line and the second scanning line through a fourth thin film transistor, wherein the driving method comprises the following steps:

inputting a first level signal to the first scan line to turn on the first thin film transistor and the second thin film transistor, wherein the first data line and the first charging line simultaneously charge the first pixel electrode through the first thin film transistor and the second thin film transistor, respectively;

inputting a second level signal to the first scan line to turn off the first thin film transistor and the second thin film transistor, inputting a first level signal to the second scan line to turn on the third thin film transistor and the fourth thin film transistor, and simultaneously charging the second pixel electrode through the third thin film transistor and the fourth thin film transistor by the second data line and the first charging line, respectively.

A third embodiment of the present invention provides a TFT array substrate, which includes a plurality of scan lines, a plurality of data lines, and a plurality of charging lines, wherein a charging line is disposed on each of left and right sides of each data line, the plurality of scan lines, the plurality of data lines, and the plurality of charging lines are defined in an insulating and intersecting manner to form a plurality of pixel units, and a pixel electrode is disposed in each pixel unit; two pixel units between two adjacent charging wires are taken as a group along the extending direction of the scanning lines, two charging wires are arranged between every two adjacent groups of pixel units, a data line is arranged between two pixel units in each group of pixel units, and two ends of each charging wire are respectively connected with one adjacent data line; each pixel electrode is connected with the adjacent scanning line, the data line and the charging line through two thin film transistors, the two thin film transistors are connected with the same scanning line, one of the two thin film transistors is connected with the adjacent scanning line, the other one of the two thin film transistors is connected with the adjacent charging line, and the two thin film transistors can charge the corresponding pixel electrodes simultaneously when being turned on.

Furthermore, two pixel electrodes are arranged in each group of pixel units, the two pixel electrodes are arranged along the extending direction of the scanning lines, the pixel electrode positioned on the left side is connected with a charging line on the left side and an adjacent data line, the pixel electrode positioned on the right side is connected with a charging line on the right side and an adjacent data line, one of the two pixel electrodes is connected with the scanning line above the pixel electrode, and the other pixel electrode is connected with the scanning line below the pixel electrode.

The third embodiment of the present invention also provides a driving method, which is applied to the TFT array substrate described above. Each group of pixel units comprises a first pixel electrode and a second pixel electrode, the first pixel electrode and the second pixel electrode are arranged along the extending direction of the scanning lines, the scanning lines comprise a first scanning line and a second scanning line, the first scanning line and the second scanning line are respectively located at the upper side and the lower side of the first pixel electrode and the second pixel electrode, the charging lines comprise a first charging line and a second charging line, the first charging line and the second charging line are respectively located at the left side and the right side of the first pixel electrode and the second pixel electrode, the data lines comprise a first data line located between the first pixel electrode and the second pixel electrode, and both ends of the first charging line and both ends of the second charging line are respectively connected with the first data line; the first pixel electrode is connected with the first charging line and the first scanning line through a first thin film transistor, the first pixel electrode is further connected with the first data line and the first scanning line through a second thin film transistor, the second pixel electrode is connected with the second charging line and the second scanning line through a third thin film transistor, and the second pixel electrode is further connected with the first data line and the second scanning line through a fourth thin film transistor, wherein the driving method comprises the following steps:

inputting a first level signal to the first scan line to turn on the first thin film transistor and the second thin film transistor, wherein the first charging line and the first data line simultaneously charge the first pixel electrode through the first thin film transistor and the second thin film transistor, respectively;

inputting a second level signal to the first scan line to turn off the first thin film transistor and the second thin film transistor, inputting a first level signal to the second scan line to turn on the third thin film transistor and the fourth thin film transistor, and simultaneously charging the second pixel electrode through the third thin film transistor and the fourth thin film transistor by the second charging line and the first data line, respectively.

Furthermore, two scanning lines are arranged between every two adjacent rows of pixel units, the two scanning lines are arranged at intervals from top to bottom, the pixel electrodes in the pixel units in the upper row are connected with one scanning line, and the pixel electrodes in the pixel units in the lower row are connected with the other scanning line.

According to the TFT array substrate and the driving method thereof, the pixel electrodes are charged simultaneously through the two thin film transistors, insufficient charging of the pixel electrodes is avoided, and meanwhile the size of the thin film transistors can be properly reduced to improve the aperture opening ratio. Meanwhile, the TFT array substrate can form a thin film transistor connected with a pixel electrode by only slightly modifying the original framework without adding any illumination process, so that the production period and the cost are saved. The TFT array substrate and the driving method thereof provided by the invention solve the problems of small aperture ratio and insufficient charging of pixel units when the PPI (Pixel number) of the display panel is large, and meet the requirements of customers on high-resolution LCD products.

Drawings

Fig. 1 is a schematic circuit diagram of a TFT array substrate according to a first embodiment of the present invention.

Fig. 2 is an enlarged schematic view of a structure of one of the pixel units in fig. 1.

Fig. 3 is a schematic plan view of fig. 2.

Fig. 4 is a schematic circuit diagram of a TFT array substrate according to a second embodiment of the present invention.

Fig. 5 is an enlarged schematic view of a group of pixel units in fig. 4.

Fig. 6 is a schematic circuit diagram of a TFT array substrate according to a third embodiment of the present invention.

Fig. 7 is an enlarged schematic view of a group of pixel units in fig. 6.

Detailed Description

The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples. The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.

The terms "first," "second," "third," "fourth," and the like in the description and in the claims, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.

The terms of orientation, up, down, left, right, front, back, top, bottom, and the like (if any) referred to in the specification and claims of the present invention are defined by the positions of structures in the drawings and the positions of the structures relative to each other, only for the sake of clarity and convenience in describing the technical solutions. It is to be understood that the use of the directional terms should not be taken to limit the scope of the claims.

First embodiment

As shown in fig. 1 to 3, a TFT array substrate according to a first embodiment of the present invention includes a plurality of scan lines 1, a plurality of data lines 2, and a plurality of pixel units P defined by the scan lines 1 and the data lines 2 in an insulated and crossed manner, wherein the pixel units P are all located in an AA (Active Area, or Active display Area) Area 10. A source driver IC6(source IC) is disposed on one side of the TFT array substrate, and a plurality of data lines 2 are connected to the source driver IC 6. Two pixel electrodes 3 are arranged in each pixel unit P, and the two pixel electrodes 3 are arranged in a row along the extending direction of the scanning line 1. Each pixel electrode 3 is connected with the adjacent scanning line 1 and the adjacent data line 2 through two thin film transistors 4, the two thin film transistors 4 are connected with the same scanning line 1 and the same data line 2, and the two thin film transistors 4 can charge the corresponding pixel electrodes 3 simultaneously when being opened.

Further, as shown in fig. 1, in the present embodiment, in each pixel unit P, one of the two pixel electrodes 3 is connected to the scan line 1 above the pixel electrode, the other is connected to the scan line 1 below the pixel electrode, and both the two pixel electrodes 3 are connected to the data line 2 on the same side.

Further, as shown in fig. 1, in the present embodiment, the pixel electrodes 3 in the pixel units P in the same row are all connected to the data line 2 on the same side, and in every two adjacent rows of pixel units P, the pixel electrodes 3 in the pixel units P in the upper row are all connected to the data line 2 on one side, and the pixel electrodes 3 in the pixel units P in the lower row are all connected to the data line 2 on the other side. For example, the pixel electrodes 3 in the pixel units P in the first row are all connected to the data line 2 on the right side thereof, the pixel electrodes 3 in the pixel units P in the second row are all connected to the data line 2 on the left side thereof, and the pixel units P in the other rows are sequentially and circularly arranged according to the rule. Of course, in other embodiments, the pixel electrodes 3 in the pixel units P in the first row may be connected to the data line 2 on the left side thereof, the pixel electrodes 3 in the pixel units P in the second row may be connected to the data line 2 on the right side thereof, and the pixel units P in the other rows are sequentially and cyclically arranged according to the rule.

Further, as shown in fig. 1, in this embodiment, two scanning lines 1 are disposed between every two adjacent rows of pixel units P, the two scanning lines 1 are disposed at intervals up and down, the pixel electrodes 3 in the pixel units P in the upper row are connected to one of the scanning lines 1, and the pixel electrodes 3 in the pixel units P in the lower row are connected to the other scanning line 1. Specifically, the pixel electrodes 3 in the pixel units P in the upper row are connected to the scan line 1 below the pixel electrodes, and the pixel electrodes 3 in the pixel units P in the lower row are connected to the scan line 1 above the pixel electrodes. The TFT array substrate is improved based on a Dual Gate architecture (double Gate architecture), and the TFT array substrate still maintains the advantages of the Dual Gate architecture, not only reduces power consumption, but also reduces the number of the data lines 2, thereby reducing the fan-out area of the data lines 2, facilitating circuit arrangement, and saving half of the area of the Source driver IC6, and meanwhile, the TFT array substrate has a compensation structure of Cgs capacitance (i.e., parasitic capacitance formed between the scan line 1 and the Source electrode of the thin film transistor 4), can reduce Source Loading (i.e., increase the Loading speed of a Source signal), and is suitable for products with larger PPI (pixelper, number of pixels).

The embodiment also provides a driving method applied to the TFT array substrate. As shown in fig. 1 and 2, in the present embodiment, each pixel unit P includes a first pixel electrode 31 and a second pixel electrode 32, and the first pixel electrode 31 and the second pixel electrode 32 are arranged in an extending direction of the scan line 1. The plurality of scan lines 1 include a first scan line 11 and a second scan line 12, and the first scan line 11 and the second scan line 12 are respectively located at upper and lower sides of the first pixel electrode 31 and the second pixel electrode 32. The plurality of data lines 2 include the first data line 21 positioned at one side of the first and second pixel electrodes 31 and 32. The first pixel electrode 31 is connected to the first data line 21 and the first scan line 11 through the first thin film transistor 41 and the second thin film transistor 42, and the second pixel electrode 32 is connected to the first data line 21 and the second scan line 12 through the third thin film transistor 43 and the fourth thin film transistor 44. The driving method includes:

a first level signal (high level signal) is input to the first scan line 11 to turn on the first thin film transistor 41 and the second thin film transistor 42, and the first data line 21 simultaneously charges the first pixel electrode 31 through the first thin film transistor 41 and the second thin film transistor 42;

inputting a second level signal (low level signal) to the first scan line 11 to turn off the first thin film transistor 41 and the second thin film transistor 42; the first level signal is input to the second scan line 12 to turn on the third and fourth thin film transistors 43 and 44, and the first data line 21 simultaneously charges the second pixel electrode 32 through the third and fourth thin film transistors 43 and 44. When the TFT array substrate operates, the scanning lines 1(G11, G12, G21, G22 …) are sequentially scanned and turned on row by row, and the pixel electrodes 3 in the pixel units P in each row are sequentially charged according to the rule.

Further, as shown in fig. 2 and 3, in the present embodiment, the first pixel electrode 31 is disposed close to the first data line 21, and the second pixel electrode 32 is disposed farther from the first data line 21 than the first pixel electrode 31. The source 431 of the third tft 43 is connected to the source 441 of the fourth tft 44, and the source 441 of the fourth tft 44 is connected to the first data line 21, and the drain 432 of the third tft 43 is formed by extending and protruding the drain 442 of the fourth tft 44. Specifically, since the source 431 of the third tft 43 is far from the first data line 21, the source 431 of the third tft 43 is connected to the source 441 of the fourth tft 44, and then the source 441 of the fourth tft 44 is connected to the first data line 21, so that the number and size of metal lines can be reduced, the arrangement space can be saved, and the aperture ratio can be improved. Meanwhile, the drain 432 of the third thin film transistor 43 and the drain 442 of the fourth thin film transistor 44 are integrated (in other words, the third thin film transistor 43 and the fourth thin film transistor 44 share one drain), which can further reduce the number and size of metal lines and improve the aperture ratio.

Specifically, the fourth thin film transistor 44 is a TFT in the original architecture, and the third thin film transistor 43 is a TFT added to the original architecture, that is, the third thin film transistor 43 is a small TFT formed on the basis of the fourth thin film transistor 44. The size of the fourth thin film transistor 44 is larger than that of the third thin film transistor 43, so the fourth thin film transistor 44 is the main TFT, and the third thin film transistor 43 is the auxiliary FTF, that is, when the second pixel electrode 32 is charged, the fourth thin film transistor 44 plays a main role, and the third thin film transistor 43 plays an auxiliary role.

Further, as shown in fig. 2 and fig. 3, in the present embodiment, the source 421 of the second thin film transistor 42 is formed by extending and protruding the first data line 21, and the drain 422 of the second thin film transistor 42 is formed by extending and protruding the drain 411 of the first thin film transistor 41.

Specifically, the first thin film transistor 41 is a TFT in the original structure, and the second thin film transistor 42 is a TFT added to the original structure, that is, the second thin film transistor 42 is a small TFT formed on the basis of the first thin film transistor 41. The size of the first thin film transistor 41 is larger than that of the second thin film transistor 42, so the first thin film transistor 41 is a main TFT, and the second thin film transistor 42 is an auxiliary FTF, that is, when the first pixel electrode 31 is charged, the first thin film transistor 41 plays a main role, and the second thin film transistor 42 plays an auxiliary role.

Specifically, in the Dual Gate structure (refer to fig. 3, compared to the embodiment without the source 421 of the second TFT 42, the active layer 423 of the second TFT 42, the source 431 of the third TFT 43, and the active layer 433 of the third TFT 43), since the U-shaped TFTs in two adjacent rows are oppositely oriented, i.e. the first TFT 41 and the fourth TFT 44 are oppositely oriented, and there is a deviation in the manufacturing process, there is a difference between the overlapping area of the first scan line 11 and the source (not numbered) of the first TFT 41 and the overlapping area of the second scan line 12 and the source 441 of the fourth TFT 44, i.e. the Cgs capacitance of the two is different in size, so that the Dual Gate structure reversely sets a small segment of metal line (i.e. the drain 422 of the second TFT 42) on the drain 411 of the first TFT 41 and a small segment of metal line on the drain 442 of the fourth TFT 44 The segment metal line (i.e., the drain electrode 432 of the third TFT 43) compensates for the Cgs capacitance by overlapping the drain electrode 422 with the first scan line 11 and the drain electrode 432 with the second scan line 12 in opposite directions, so that the Cgs capacitances of two adjacent rows of TFTs (i.e., the first TFT 41 and the fourth TFT 44) are the same in size. That is, in the existing Dual Gate architecture, the drain 422 of the second TFT 42 and the drain 432 of the third TFT 43 are present, so that the embodiment only needs to add the source 421 and the active layer 423 of the second TFT 42 and the source 431 and the active layer 433 of the third TFT 43, and this structure does not affect the aperture ratio, and two additional TFTs are added to charge the pixel electrode 3, so that the Dual Gate architecture is suitable for high PPI products.

Specifically, as shown in fig. 3, when manufacturing the second thin film transistor 42 and the third thin film transistor 43, it is only necessary to extend and adjust the original metal lines in the X direction (i.e., the extending direction of the scan line 1) based on the original design, and add the active layer 423/433 (i.e., the a-si layer), without adding any light (mask) process and other processes, and without adding metal lines in the Y direction (i.e., the extending direction of the data line 2), which is beneficial to saving the cost. And the main TFTs (the first thin film transistor 41 and the fourth thin film transistor 44) can be appropriately reduced in size to improve the aperture ratio. Meanwhile, the second thin film transistor 42 and the third thin film transistor 43 are added in a straight line structure, and the second thin film transistor 42 and the third thin film transistor 43 are both disposed under the black matrix (BM, not shown), so that the aperture ratio is not affected.

The TFT array substrate and the driving method thereof provided by the embodiment of the invention have the advantages that:

1. each pixel electrode 3 is charged simultaneously through two thin film transistors 4, so that insufficient charging of the pixel electrode 3 is avoided, and the size of the thin film transistor 4 can be reduced appropriately to improve the aperture ratio.

2. When the second thin film transistor 42 and the third thin film transistor 43 are manufactured, it is only necessary to extend and adjust the original metal line in the X direction (i.e., the extending direction of the scan line 1) based on the original design, and add an active layer (not numbered, i.e., an a-si layer) at the same time, without adding any light (mask) process and other processes, and without adding a metal line in the Y direction (i.e., the extending direction of the data line 2), which is beneficial to saving the production period and cost.

3. The TFT array substrate has the advantages of a Dual Gate architecture, not only reduces the power consumption, but also reduces the number of the data lines 2, thereby reducing the fan-out area of the data lines 2, facilitating the line arrangement, saving the area of a Source driving IC6 which is half, simultaneously having a Cgs capacitance compensation structure, reducing Source Loading and being applicable to PPI larger products.

The TFT array substrate and the driving method thereof provided by the embodiment solve the problems of small aperture ratio and insufficient charging of the pixel unit when the PPI of the display panel is large, and meet the requirement of a customer on a high resolution LCD product.

Second embodiment

As shown in fig. 4 and 5, a TFT array substrate according to a second embodiment of the present invention includes a plurality of scan lines 1, a plurality of data lines 2, and a plurality of charging lines 5, wherein each charging line 5 is located between two adjacent data lines 2, the plurality of scan lines 1, the plurality of data lines 2, and the plurality of charging lines 5 are insulated and crossed to form a plurality of pixel units P, and each pixel unit P is provided with a pixel electrode 3. A plurality of pixel units P are located in the AA region 10, and a plurality of data lines 2 are connected to the source driver IC 6.

Further, as shown in fig. 4, two pixel units P between two adjacent data lines 2 are taken as a group, and two data lines 2 are disposed between every two adjacent groups of pixel units P along the extending direction of the scanning line 1. Specifically, the two adjacent data lines 2 may be metal lines of the same layer (the two data lines 2 are both metal lines of M2 layers, that is, lines of a second metal layer), or metal lines of different layers (one of the two data lines 2 is a metal line of M2 layers, the other is a metal line of M3 layers, the metal line of M2 layers and the metal line of M3 layers adopt a stacked design, and the data line 2 located in the M3 layer bridges M2 at the TFT through a TH hole), and since there is a cgoc layer (a flat layer) between the metal line of M3 layer and the metal line of M2 layer, the parasitic capacitance between the two lines is small, and it is ensured that the TFT structure is added at the Cgs capacitance compensation position without losing the aperture ratio.

Further, as shown in fig. 4, a charging line 5 is disposed between two pixel units P in each group of pixel units P, and both ends of each charging line 5 are respectively connected to two adjacent data lines 2 (the connection point between both ends of the charging line 5 and two adjacent data lines 2 is located outside the AA area 10). Every pixel electrode 3 all links to each other with its adjacent scanning line 1, data line 2 and charging wire 5 through two thin film transistor 4, and two thin film transistor 4 all link to each other with same scanning line 1, and one of them links to each other with adjacent scanning line 1 in two thin film transistor 4, and another one links to each other with adjacent charging wire 5, and two thin film transistor 4 can charge corresponding pixel electrode 3 simultaneously when opening.

Further, as shown in fig. 4, two scanning lines 1 are disposed between every two adjacent rows of pixel units P, the two scanning lines 1 are disposed at intervals up and down, the pixel electrodes 3 in the pixel units P in the upper row are connected to one of the scanning lines 1, and the pixel electrodes 3 in the pixel units P in the lower row are connected to the other scanning line 1.

Further, as shown in fig. 4 and 5, in this embodiment, two pixel electrodes 3 are disposed in each group of pixel units P, the two pixel electrodes 3 are arranged in a row along the extending direction of the scanning line 1, the pixel electrode 3 on the left side is connected to the data line 2 on the left side and the adjacent charging line 5, the pixel electrode 3 on the right side is connected to the data line 2 on the right side and the adjacent charging line 5, one of the two pixel electrodes 3 is connected to the scanning line 1 above the one, and the other is connected to the scanning line 1 below the one. Specifically, in the present embodiment, the pixel electrode 3 on the left side is connected to the scan line 1 above the pixel electrode, and the pixel electrode 3 on the right side is connected to the scan line 1 below the pixel electrode.

The embodiment also provides a driving method applied to the TFT array substrate. As shown in fig. 4 and 5, in the present embodiment, each group of pixel units P includes a first pixel electrode 31 and a second pixel electrode 32, and the first pixel electrode 31 and the second pixel electrode 32 are arranged in an extending direction of the scan line 1. The plurality of scan lines 1 include first scan lines 11 and second scan lines 12, the first scan lines 11 and the second scan lines 12 are respectively located at upper and lower sides of the first pixel electrodes 31 and the second pixel electrodes 32, the plurality of data lines 2 include first data lines 21 and second data lines 22, and the first data lines 21 and the second data lines 22 are respectively located at left and right sides of the first pixel electrodes 31 and the second pixel electrodes 32. The plurality of charging lines 5 includes a first charging line 51 between the first pixel electrode 31 and the second pixel electrode 32, and both ends of the first charging line 51 are connected to the first data line 21 and the second data line 22, respectively. The first pixel electrode 31 is connected to the first data line 21 and the first scan line 11 through the first thin film transistor 41, the first pixel electrode 31 is further connected to the first charging line 51 and the first scan line 11 through the second thin film transistor 42, the second pixel electrode 32 is connected to the second data line 22 and the second scan line 12 through the third thin film transistor 43, and the second pixel electrode 32 is further connected to the first charging line 51 and the second scan line 12 through the fourth thin film transistor 44. The driving method includes:

inputting a first level signal to the first scan line 11 to turn on the first thin film transistor 41 and the second thin film transistor 42, and simultaneously charging the first pixel electrode 31 through the first thin film transistor 41 and the second thin film transistor 42 by the first data line 21 and the first charging line 51 (the voltage signal on the first data line 21 is divided into the first charging line 51);

a second level signal is input to the first scan line 11 to turn off the first thin film transistor 41 and the second thin film transistor 42, a first level signal is input to the second scan line 12 to turn on the third thin film transistor 43 and the fourth thin film transistor 44, and the second data line 22 and the first charging line 51 (the voltage signal on the second data line 22 is divided into the first charging line 51) simultaneously charge the second pixel electrode 32 through the third thin film transistor 43 and the fourth thin film transistor 44, respectively.

Further, in the present embodiment, the first thin film transistor 41 and the third thin film transistor 43 are main TFTs, and the second thin film transistor 42 and the fourth thin film transistor 44 are sub TFTs.

Other structures and principles of the present embodiment are the same as those of the first embodiment, and are not described herein.

The TFT array substrate provided in this embodiment has similar effects to those of the first embodiment, and similarly, the pixel electrode 3 is charged simultaneously by two thin film transistors 4, so that insufficient charging of the pixel electrode 3 is avoided, and at the same time, the size of the thin film transistor 4 can be reduced appropriately to improve the aperture ratio. The embodiment also has the advantages of a Dual Gate architecture, not only reduces the power consumption, but also reduces the number of the data lines 2, thereby reducing the fan-out area of the data lines 2, facilitating the line arrangement, saving the area of the Source driving IC6, having a Cgs capacitance compensation structure, reducing Source Loading, and being applicable to PPI larger products. Meanwhile, the second thin film transistor 42 and the fourth thin film transistor 44 are simple to manufacture, and do not need to add any illumination process, which is beneficial to saving the production period and cost.

The TFT array substrate and the driving method thereof provided by the embodiment solve the problems of small aperture ratio and insufficient charging of the pixel unit when the PPI of the display panel is large, and meet the requirement of a customer on a high resolution LCD product.

Third embodiment

As shown in fig. 6 and 7, a TFT array substrate according to a third embodiment of the present invention includes a plurality of scan lines 1, a plurality of data lines 2, and a plurality of charging lines 5, wherein one charging line 5 is respectively disposed on both left and right sides of each data line 2, the plurality of scan lines 1, the plurality of data lines 2, and the plurality of charging lines 5 are insulated and crossed to define a plurality of pixel units P, and each pixel unit P has a pixel electrode 3 disposed therein. A plurality of pixel units P are located in the AA region 10, and a plurality of data lines 2 are connected to the source driver IC 6.

Further, as shown in fig. 6, two pixel units P between two adjacent charging lines 5 are taken as a group, and two charging lines 5 are disposed between every two adjacent groups of pixel units P along the extending direction of the scanning line 1. Specifically, the two adjacent charging lines 5 may be metal lines of the same layer (the two charging lines 5 are both metal lines of M2 layers), or may be metal lines of different layers (one of the two charging lines 5 is a metal line of M2 layers, the other is a metal line of M3 layers, the metal line of M2 layers and the metal line of M3 layers adopt a stacked design, the charging line 5 located at the M3 layer bridges M2 through a TH hole at the TFT), because there is an OC layer (flat layer) between the metal line of M3 layers and the metal line of M2 layers, the parasitic capacitance between the two lines is small, and it is ensured that the TFT structure is added at the Cgs capacitance compensation position without losing the aperture ratio.

Further, as shown in fig. 6, a data line 2 is disposed between two pixel units P in each group of pixel units P, and both ends of each charging line 5 are respectively connected to an adjacent data line 2 (a connection point between both ends of each charging line 5 and the adjacent data line 2 is located outside the AA area 10), that is, both ends of each data line 2 are respectively connected to two adjacent charging lines 5. Every pixel electrode 3 all links to each other with its adjacent scanning line 1, data line 2 and charging wire 5 through two thin film transistor 4, and two thin film transistor 4 all link to each other with same scanning line 1, and one of them links to each other with adjacent scanning line 1 in two thin film transistor 4, and another one links to each other with adjacent charging wire 5, and two thin film transistor 4 can charge corresponding pixel electrode 3 simultaneously when opening.

Further, as shown in fig. 6, two scanning lines 1 are disposed between every two adjacent rows of pixel units P, the two scanning lines 1 are disposed at intervals up and down, the pixel electrodes 3 in the pixel units P in the upper row are connected to one of the scanning lines 1, and the pixel electrodes 3 in the pixel units P in the lower row are connected to the other scanning line 1.

Further, as shown in fig. 6, two pixel electrodes 3 are disposed in each group of pixel units P, the two pixel electrodes 3 are arranged in a row along the extending direction of the scan line 1, the pixel electrode 3 on the left side is connected to the charge line 5 on the left side and the adjacent data line 2, the pixel electrode 3 on the right side is connected to the charge line 5 on the right side and the adjacent data line 2, one of the two pixel electrodes 3 is connected to the scan line 1 above the one of the two pixel electrodes, and the other one is connected to the scan line 1 below the one of the two pixel electrodes. Specifically, in the present embodiment, the pixel electrode 3 on the left side is connected to the scan line 1 above the pixel electrode, and the pixel electrode 3 on the right side is connected to the scan line 1 below the pixel electrode.

The embodiment also provides a driving method applied to the TFT array substrate. As shown in fig. 6 and 7, in the present embodiment, each group of pixel units P includes a first pixel electrode 31 and a second pixel electrode 32, and the first pixel electrode 31 and the second pixel electrode 32 are arranged in a direction along which the scan line 1 extends. The plurality of scan lines 1 include a first scan line 11 and a second scan line 12, and the first scan line 11 and the second scan line 12 are respectively located at upper and lower sides of the first pixel electrode 31 and the second pixel electrode 32. The plurality of charging lines 5 include first and second charging lines 51 and 52, and the first and second charging lines 51 and 52 are located at left and right sides of the first and second pixel electrodes 31 and 32, respectively. The plurality of data lines 2 includes a first data line 21 between the first pixel electrode 31 and the second pixel electrode 32, and both ends of the first charging line 51 and both ends of the second charging line 52 are connected to the first data line 21, respectively. The first pixel electrode 31 is connected to a first charging line 51 and a first scan line 11 through a first thin film transistor 41, the first pixel electrode 31 is further connected to a first data line 21 and the first scan line 11 through a second thin film transistor 42, the second pixel electrode 32 is connected to a second charging line 52 and a second scan line 12 through a third thin film transistor 43, and the second pixel electrode 32 is further connected to the first data line 21 and the second scan line 12 through a fourth thin film transistor 44. The driving method includes:

inputting a first level signal to the first scan line 11 to turn on the first thin film transistor 41 and the second thin film transistor 42, and simultaneously charging the first pixel electrode 31 by the first charging line 51 (the voltage signal on the first data line 21 is divided into the first charging line 51) and the first data line 21 through the first thin film transistor 41 and the second thin film transistor 42, respectively;

a second level signal is input to the first scan line 11 to turn off the first thin film transistor 41 and the second thin film transistor 42, a first level signal is input to the second scan line 12 to turn on the third thin film transistor 43 and the fourth thin film transistor 44, and the second charging line 52 (the voltage signal on the first data line 21 is divided into the second charging line 52) and the first data line 21 simultaneously charge the second pixel electrode 32 through the third thin film transistor 43 and the fourth thin film transistor 44, respectively.

Further, in the present embodiment, the second thin film transistor 42 and the fourth thin film transistor 44 are main TFTs, and the first thin film transistor 41 and the third thin film transistor 43 are auxiliary TFTs.

Other structures and principles of the present embodiment are the same as those of the first embodiment, and are not described herein.

The TFT array substrate provided in this embodiment has similar effects to those of the first embodiment, and similarly, the pixel electrode 3 is charged simultaneously by two thin film transistors 4, so that insufficient charging of the pixel electrode 3 is avoided, and at the same time, the size of the thin film transistor 4 can be reduced appropriately to improve the aperture ratio. The embodiment also has the advantages of a Dual Gate architecture, not only reduces the power consumption, but also reduces the number of the data lines 2, thereby reducing the fan-out area of the data lines 2, facilitating the line arrangement, saving the area of the Source driving IC6, having a Cgs capacitance compensation structure, reducing Source Loading, and being applicable to PPI larger products. Meanwhile, the first thin film transistor 41 and the third thin film transistor 43 are simple to manufacture, and any illumination process is not required to be added, which is beneficial to saving the production period and the cost.

The TFT array substrate and the driving method thereof provided by the embodiment solve the problems of small aperture ratio and insufficient charging of the pixel unit when the PPI of the display panel is large, and meet the requirement of a customer on a high resolution LCD product.

The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention.