1. A detection method of a display device, the detection method comprising:

checking a connection failure of the light emitting elements included in the pixels and connected in series based on the first control signal, the second control signal and a voltage of the initialization power supply,

wherein the pixel includes:

a pixel circuit controlling a current flowing from a first power source to a second node in response to a voltage of the first node;

a first light emitting element connected to the second node;

a first transistor controlling the voltage of the initialization power supplied to the second node;

a second light emitting element electrically connected between the first light emitting element and a second power source; and

a second transistor having a first electrode connected to a third node between the first light emitting element and the second light emitting element and a gate electrode connected to a first detection control line.

2. The detection method according to claim 1, wherein the first transistor is connected between the second node and a sense line, and a second electrode of the second transistor is connected to the second power supply, and

wherein checking the connection failure of the light emitting element includes:

supplying the initialization power of a first voltage level to the sensing line and turning on the first transistor and the second transistor;

determining that the connection of the second light emitting element is abnormal in a case where the pixel emits light; and

determining that the connection of the first light emitting element is abnormal in a case where the pixel does not emit light.

3. The detection method according to claim 2, wherein the pixel circuit includes:

a third transistor connected between the first power source and the second node and having a gate electrode connected to the first node;

a fourth transistor connected between the first node and a data line and having a gate electrode connected to a scan line; and

a storage capacitor connected between the first node and the second node, and

wherein a gate electrode of the first transistor is connected to a control line transmitting the first control signal.

4. The detection method according to claim 1, wherein the first transistor is connected between the second node and a sense line, and a second electrode of the second transistor is connected to a first detection power supply line that supplies a voltage of an illumination detection power supply, and

wherein checking the connection failure of the light emitting element includes:

checking a connection failure of the first light emitting element based on the initialization power; and

checking a connection failure of the second light emitting element based on the illumination detection power supply.

5. The detection method according to claim 4, wherein checking the first light emitting element for a connection failure comprises:

supplying the initialization power having a first voltage level to the sensing line and the illumination detection power having a second voltage level lower than the first voltage level and a voltage level of the second power to the first detection power line;

turning on the first transistor and the second transistor; and

determining whether the connection of the first light emitting element is normal or abnormal based on whether the pixel emits light.

6. The detection method according to claim 5, wherein checking the second light emitting element for a connection failure comprises:

supplying the initialization power having a third voltage level lower than the first voltage level to the sensing line, and supplying the illumination detection power having a fourth voltage level higher than the second voltage level to the first detection power line, wherein the fourth voltage level is higher than or equal to the third voltage level and higher than the voltage level of the second power source;

turning on the second transistor; and

determining whether the connection of the second light emitting element is normal or abnormal based on whether the pixel emits light.

7. The detection method of claim 6, wherein the pixel further comprises:

a third light emitting element electrically connected between the second light emitting element and the second power source; and

a fifth transistor having a first electrode connected to a fourth node between the second light emitting element and the third light emitting element and a gate electrode connected to a second detection control line.

8. The detection method according to claim 7, wherein a second electrode of the fifth transistor is connected to the second power supply, and

wherein the fifth transistor is turned on simultaneously with the second transistor in response to a third control signal supplied to the second detection control line when checking a connection failure of the first light emitting element.

9. The detection method according to claim 7, wherein a second electrode of the fifth transistor is connected to the second power supply, and

wherein the fifth transistor is turned on simultaneously with the second transistor in response to a third control signal supplied to the second detection control line when checking a connection failure of the second light emitting element.

10. The detection method according to claim 7, wherein a second electrode of the fifth transistor is connected to a second detection power supply line that supplies a voltage of an additional illumination detection power supply,

wherein checking the connection failure of the light emitting element includes:

checking a connection failure of the third light emitting element based on the additional illumination detection power source,

wherein checking the connection failure of the third light emitting element comprises:

supplying the initialization power having the third voltage level to the sense line;

supplying the illumination detection power supply having the fourth voltage level to the first detection power supply line;

supplying the additional illumination detection power having a fifth voltage level higher than the fourth voltage level to the second detection power supply line;

turning on the first transistor, the second transistor, and the fifth transistor; and

determining whether the connection of the third light emitting element is normal or abnormal based on whether the pixel emits light.

Background

A display device generally displays an image using pixels connected to scan lines and data lines. To this end, each of the pixels includes a light emitting element and a driving transistor.

The driving transistor controls an amount of current supplied to the light emitting element in response to a data signal supplied from the data line. The light emitting element emits light with luminance (e.g., set or predetermined luminance) corresponding to the amount of current supplied from the driving transistor.

For example, the luminance of light emitted from the light emitting element may be controlled according to the amount of current supplied to the light emitting element, and the light emitting element may have a diode characteristic. When a single pixel includes a plurality of light emitting elements, a structure in which light emitting elements controlled by a current are connected in series may be advantageous in power consumption, compared to a structure in which light emitting elements are connected in parallel.

However, when one of the light emitting elements connected in series is open and/or short-circuited, the corresponding pixel does not emit light. Therefore, a technique for detecting a connection failure of each of the light emitting elements connected (or aligned) in series can be utilized.

The above information disclosed in this background section is only for enhancement of understanding of the background, and therefore the information discussed in this background section does not necessarily constitute prior art.

Disclosure of Invention

An aspect of some example embodiments of the present invention includes a detection method of a display apparatus capable of detecting a connection failure of each of light emitting elements connected in series.

An aspect of some example embodiments of the present invention includes a display device including a transistor connected to each of light emitting elements to detect a connection failure of each of the light emitting elements connected in series.

However, aspects of the embodiments according to the present invention are not limited to the above-described characteristics, and various extensions may be made without departing from the spirit and scope of the embodiments according to the present invention.

A detection method of a display apparatus according to some example embodiments of the present invention may include: a connection failure of light emitting elements included in the pixels and connected in series is checked based on the first control signal, the second control signal, and a voltage of the initialization power supply. The pixel may include: a pixel circuit controlling a current flowing from a first power source to a second node in response to a voltage of the first node; a first light emitting element connected to the second node; a first transistor controlling a voltage of an initialization power supplied to the second node; a second light emitting element electrically connected between the first light emitting element and a second power source; and a second transistor having a first electrode connected to a third node between the first light emitting element and the second light emitting element and a gate electrode connected to the first detection control line.

According to some example embodiments, the first transistor may be connected between the second node and the sensing line, and the second electrode of the second transistor may be connected to a second power source. Checking the connection failure of the light emitting element may include: supplying an initialization power of a first voltage level to the sensing line and turning on the first transistor and the second transistor; determining that the connection of the second light emitting element is abnormal when the pixel emits light; and determining that the connection of the first light emitting element is abnormal when the pixel does not emit light.

According to some example embodiments, the first transistor may be turned on in response to a first control signal, and the second transistor may be turned on in response to a second control signal supplied to the first detection control line.

According to some example embodiments, the pixel circuit may include: a third transistor connected between the first power source and the second node and having a gate electrode connected to the first node; a fourth transistor connected between the first node and the data line and having a gate electrode connected to the scan line; and a storage capacitor connected between the first node and the second node. The gate electrode of the first transistor may be connected to a control line transmitting the first control signal.

According to some example embodiments, the fourth transistor may be turned off during a period in which the first transistor and the second transistor are turned on.

According to some example embodiments, the first transistor may be connected between the second node and the sensing line, and the second electrode of the second transistor may be connected to a first detection power line supplying a voltage of the illumination detection power source. Checking the connection failure of the light emitting element may include: checking a connection failure of the first light emitting element based on the initialization power; and checking a connection failure of the second light emitting element based on the illumination detection power supply.

According to some example embodiments, checking the connection failure of the first light emitting element may include: supplying an initialization power having a first voltage level to the sensing line and an illumination detection power having a second voltage level lower than the first voltage level to the first detection power line; turning on the first transistor and the second transistor; determining that the connection of the first light emitting element is normal when the pixel emits light; and determining that the connection of the first light emitting element is abnormal when the pixel does not emit light.

According to some example embodiments, checking the connection failure of the second light emitting element may include: supplying an initialization power having a third voltage level lower than the first voltage level to the sensing line, and supplying an illumination detection power having a fourth voltage level higher than the second voltage level to the first detection power line; turning on the second transistor; determining that the connection of the second light emitting element is normal when the pixel emits light; and determining that the connection of the second light emitting element is abnormal when the pixel does not emit light.

According to some example embodiments, the second transistor may be turned on simultaneously with the first transistor.

According to some example embodiments, the pixel may further include: a third light emitting element electrically connected between the second light emitting element and the second power supply; and a fifth transistor having a first electrode connected to a fourth node between the second light emitting element and the third light emitting element and a gate electrode connected to the second detection control line.

According to some example embodiments, the second electrode of the fifth transistor may be connected to the second power supply, and in the checking of the connection failure of the first light emitting element, the fifth transistor may be turned on simultaneously with the second transistor in response to a third control signal supplied to the second detection control line.

According to some example embodiments, the first voltage level may be higher than the second voltage level, and the fourth voltage level may be higher than or equal to the third voltage level.

According to some example embodiments, the fourth voltage level may be higher than a voltage level of the second power supply, and the second voltage level may be lower than the voltage level of the second power supply.

According to some example embodiments, the second electrode of the fifth transistor may be connected to the second power supply, and in the checking of the connection failure of the second light emitting element, the fifth transistor may be turned on simultaneously with the second transistor in response to a third control signal supplied to the second detection control line.

According to some example embodiments, the second electrode of the fifth transistor may be connected to a second detection power line supplying a voltage of the additional illumination detection power source. Checking the connection failure of the light emitting element may include: the connection failure of the third light emitting element is checked based on the additional illumination detection power source.

According to some example embodiments, checking the connection failure of the third light emitting element may include: supplying an initialization power having a third voltage level to the sensing line, an illumination detection power having a fourth voltage level to the first detection power line, and an additional illumination detection power having a fifth voltage level higher than the fourth voltage level to the second detection power line; turning on the first transistor, the second transistor, and the fifth transistor; determining that the connection of the third light emitting element is normal when the pixel emits light; and determining that the connection of the third light emitting element is abnormal when the pixel does not emit light.

According to some example embodiments, checking the connection failure of the light emitting element may include: before checking a connection failure of a light emitting element, causing all pixels included in a pixel unit to emit light; determining a pixel represented by a dark point as a defective pixel by analyzing the brightness of the pixel; and checking a connection failure of the light emitting element with respect to the defective pixel.

A display device according to some example embodiments of the present invention may include: pixels connected to the scan lines, the control lines, the detection control lines, the data lines, and the sensing lines; a scan driver supplying a scan signal to the scan lines and a control signal to the control lines; a data driver supplying one of an image data signal and a sensing data signal to the data lines; and a sensing circuit that senses a characteristic of the pixel based on a sensing value supplied through the sensing line. The pixels located on the ith horizontal line among the pixels may include (where i is a natural number): a pixel circuit controlling a current flowing from a first power source to a second node in response to a voltage of the first node; a first light emitting element connected to the second node; a first transistor controlling a voltage of an initialization power supplied to the second node; a second light emitting element electrically connected between the first light emitting element and a second power source; and a second transistor having a first electrode connected to a third node between the first light emitting element and the second light emitting element and a gate electrode connected to an ith first detection control line.

According to some example embodiments, the pixel circuit may include: a third transistor connected between the first power source and the second node and having a gate electrode connected to the first node; a fourth transistor connected between the first node and one of the data lines and having a gate electrode connected to the ith scan line; and a storage capacitor connected between the first node and the second node. The first transistor may be connected between the second node and one of the sensing lines, and the first transistor may include a gate electrode connected to an ith control line transmitting the first control signal. The second electrode of the second transistor may be connected to a first detection power line supplying a voltage of the illumination detection power source.

According to some example embodiments, when a connection failure of the first light emitting element is detected, the first transistor and the second transistor may be simultaneously turned on, and a voltage of the initialization power supplied to the sensing line may be higher than a voltage of the illumination detection power. When a connection failure of the second light emitting element is detected, the first transistor and the second transistor may be simultaneously turned on, a voltage of the initialization power supplied to the sensing line may be lower than a voltage of the illumination detection power, and the voltage of the illumination detection power may be higher than a voltage of the second power.

Drawings

The accompanying drawings, which are included to provide a further understanding of the inventive concepts and are incorporated in and constitute a part of this specification, illustrate aspects of some example embodiments of the inventive concepts and together with the description serve to explain the principles of the inventive concepts.

Fig. 1 is a block diagram illustrating a display apparatus according to some example embodiments of the present invention.

Fig. 2 is a block diagram illustrating an example of the display apparatus of fig. 1.

Fig. 3 is a circuit diagram showing an example of a pixel included in the display device of fig. 1.

Fig. 4 is a timing chart showing an example of the operation of a display device including the pixel of fig. 3.

Fig. 5 is a block diagram schematically showing an example of a configuration for illumination detection of the display device of fig. 1.

Fig. 6A and 6B are timing charts for explaining a detection method of the display device.

Fig. 7 is a circuit diagram showing another example of a pixel included in the display device of fig. 1.

Fig. 8 is a timing chart for explaining an example of a detection method of a display device including the pixel of fig. 7.

Fig. 9 is a timing chart for explaining another example of a detection method of a display device including the pixel of fig. 7.

Fig. 10 is a circuit diagram showing another example of a pixel included in the display device of fig. 1.

Fig. 11 is a timing chart for explaining an example of a detection method of a display device including the pixel of fig. 10.

Fig. 12 is a timing chart for explaining another example of a detection method of a display device including the pixel of fig. 10.

Fig. 13 is a circuit diagram showing still another example of a pixel included in the display device of fig. 1.

Fig. 14 is a timing chart for explaining an example of a detection method of a display device including the pixel of fig. 13.

Fig. 15 is a circuit diagram illustrating an example of a pixel included in a display device according to some example embodiments of the present invention.

Detailed Description

In the following, aspects of some example embodiments of the invention will be described in more detail with reference to the drawings. In the drawings, the same reference numerals are used for the same components, and some repetitive description for the same components may be omitted.

Fig. 1 is a block diagram illustrating a display apparatus according to some example embodiments of the present invention. Fig. 2 is a block diagram illustrating an example of the display apparatus of fig. 1.

Referring to fig. 1 and 2, the display device 1000 may include a pixel unit 100, a scan driver 200, a data driver 300, a sensing circuit 400, and a timing controller 600.

The display device 1000 may be a flat panel display device, a flexible display device, a bending display device, a foldable display device, or a bendable display device. In addition, the display device 1000 can be applied to a transparent display device, a head-mounted display device, a wearable display device, and the like. In addition, the display apparatus 1000 may be applied to various electronic apparatuses (such as a smart phone, a tablet computer, a smart pad, a TV, and a monitor).

The display device 1000 may be implemented as an organic light emitting display device, a liquid crystal display device, or the like. However, this is an example, and the configuration of the display device 1000 is not limited thereto. For example, the display device 1000 according to some example embodiments may be a self-light emitting display device including inorganic light emitting elements.

According to some example embodiments, the display device 1000 may be driven by being divided into a display period for displaying an image and a sensing period for sensing characteristics of a driving transistor included in each of the pixels PX.

The pixel unit 100 may include pixels PX connected to data lines DL1 to DLm, scan lines SL1 to SLn, control lines CL1 to CLn, and sensing lines SSL1 to SSLm, where m and n are natural numbers. The pixels PX may be supplied with voltages of the first power source VDD and the second power source VSS from the outside.

Although n scan lines SL1 to SLn are shown in fig. 1, embodiments according to the present invention are not limited thereto. For example, one or more control lines, scan lines, and sensing lines may be additionally formed in the pixel unit 100 corresponding to the circuit structure of the pixel PX.

According to some example embodiments, the transistor included in the pixel PX may be an N-type oxide thin film transistor. For example, the oxide thin film transistor may be a Low Temperature Polycrystalline Oxide (LTPO) thin film transistor. However, this is an example, and the N-type transistor is not limited thereto. For example, the active pattern (semiconductor layer) included in the transistor may include an inorganic semiconductor (e.g., amorphous silicon or polycrystalline silicon), an organic semiconductor, or the like. In addition, at least one of the transistors included in the display device 1000 and/or the pixel PX may be replaced with a P-type transistor.

The timing controller 600 may generate a data driving control signal DCS and a scan driving control signal SCS in response to synchronization signals supplied from the outside. The data driving control signal DCS generated by the timing controller 600 may be supplied to the data driver 300, and the scan driving control signal SCS may be supplied to the scan driver 200.

In addition, the timing controller 600 may supply the compensated image data CDATA compensated based on the input image data IDATA to the data driver 300. The input image data IDATA and the compensation image data CDATA may include gray scale information included in a gray scale range set in the display device.

The data driving control signal DCS may include a source start signal and a data clock signal. The source start signal may control a start time point for sampling data. The data clock signal may be used to control the sampling operation.

The scan driving control signal SCS may include a scan start signal, a control start signal, and a scan clock signal. The scan start signal may control the timing of the scan signal. The control start signal may control the timing of the control signal. The scan clock signal may be used to shift the scan start signal and/or the control start signal.

The timing controller 600 may control the operation of the sensing circuit 400. For example, the timing controller 600 may control a timing for supplying a voltage of an initialization power to the pixels PX through the sensing lines SSL1 to SSLm and/or a timing for sensing a current generated in the pixels PX through the sensing lines SSL1 to SSLm. Here, initializing the power supply is a term arbitrarily defined for convenience of description, and is not construed as being limited to the term.

The scan driver 200 may receive a scan driving control signal SCS from the timing controller 600. The scan driver 200 receiving the scan driving control signal SCS may supply scan signals to the scan lines SL1 to SLn and control signals to the control lines CL1 to CLn.

For example, the scan driver 200 may sequentially supply scan signals to the scan lines SL1 to SLn. When the scan signals are sequentially supplied to the scan lines SL1 to SLn, the pixels PX may be selected in units of horizontal lines.

Similarly, the scan driver 200 may supply control signals to the control lines CL1 to CLn. The control signal may be used to sense (or extract) a driving current flowing through the pixel PX (i.e., a current flowing through the driving transistor). The timing and the waveform to which the scan signal and the control signal are supplied may be differently set according to the display period and the sensing period.

According to some example embodiments, the control signal may be supplied for lighting of the light emitting element during the illumination detection.

In fig. 1, one scan driver 200 outputs both scan signals and control signals, but the embodiment according to the present invention is not limited thereto. For example, the scan driver 200 may include a first scan driver for supplying a scan signal to the pixel unit 100 and a second scan driver for supplying a control signal to the pixel unit 100.

The data driver 300 may receive a data driving control signal DCS from the timing controller 600. The data driver 300 may supply a data signal (e.g., a sensing data signal) for detecting a pixel characteristic to the pixel unit 100 during the sensing period. The data driver 300 may supply a data signal for displaying an image to the pixel unit 100 based on the compensated image data CDATA during the display period.

The sensing circuit 400 may generate a compensation value that compensates the characteristic value of the pixel PX based on the sensing value provided from the sensing lines SSL1 to SSLm. For example, the sensing circuit 400 may detect and compensate for a change in threshold voltage and a change in mobility of a driving transistor included in the pixel PX, a change in characteristics of a light emitting element, and the like.

According to some example embodiments, during the sensing period, the sensing circuit 400 may supply a reference voltage (e.g., a set or predetermined reference voltage) (or an initialization voltage) to the pixels PX through the sensing lines SSL1 to SSLm and receive a current or voltage extracted from the pixels PX. The extracted current or voltage may correspond to a sensed value, and the sensing circuit 400 may detect a characteristic change of the driving transistor based on the sensed value. The sensing circuit 400 may calculate a compensation value for compensating the input image data IDATA based on the detected characteristic change. The compensation value may be provided to the timing controller 600 or the data driver 300.

During the display period, the sensing circuit 400 may supply a voltage (e.g., a set or predetermined voltage) of an initialization power supply for displaying an image to the pixel unit 100 through the sensing lines SSL1 to SSLm.

Although the sensing circuit 400 is illustrated as having a separate configuration from the timing controller 600 in fig. 1, at least a part of the configuration of the sensing circuit 400 may be included in the timing controller 600. For example, the sensing circuit 400 and the timing controller 600 may be formed of one driving IC. In addition, the data driver 300 may also be included in the timing controller 600.

At least some of the sensing circuit 400, the data driver 300, and the timing controller 600 may be formed of one driving IC. According to some example embodiments, as shown in fig. 2, the panel driver 700 implemented as one driving IC may perform all functions of the sensing circuit 400, the data driver 300, and the timing controller 600.

Fig. 3 is a circuit diagram showing an example of a pixel included in the display device of fig. 1.

In fig. 3, for convenience of description, the pixel 10 located on the ith horizontal line and connected to the jth data line DLj is shown.

Referring to fig. 1 and 3, the pixel 10 may include a plurality of light emitting elements LD1 and LD2, a first transistor T1, a second transistor T2, and a pixel circuit PXC.

According to some example embodiments, the pixel circuit PXC may include a third transistor T3 (driving transistor), a storage capacitor Cst, and a fourth transistor T4.

According to some example embodiments, the light emitting elements LD1 and LD2 may include a first light emitting element LD1 and a second light emitting element LD2 connected in series. However, this is an example, and the pixel 10 may also include a light emitting element connected in series with the first light emitting element LD1 and the second light emitting element LD 2. In addition, the pixel 10 may further include a light emitting element connected in parallel with the first light emitting element LD1 or the second light emitting element LD 2.

According to some example embodiments, the first and second light emitting elements LD1 and LD2 may be ultra-small light emitting elements having a size as small as a nano-scale to a micro-scale. These ultra-small light emitting elements may include a material having an inorganic crystal structure, and the material having an inorganic crystal structure may emit light. However, this is merely an example, and at least one of the first light emitting element LD1 and the second light emitting element LD2 may be an organic light emitting element.

A first electrode (e.g., an anode) of the first light emitting element LD1 may be connected to the second node N2, and a second electrode (e.g., a cathode) of the first light emitting element LD1 may be connected to the third node N3. The first electrode of the second light emitting element LD2 may be connected to the third node N3, and the second electrode of the second light emitting element LD2 may be electrically connected to the second power source VSS. The first and second light emitting elements LD1 and LD2 may emit light having a luminance (e.g., a set or predetermined luminance) corresponding to the amount of current supplied from the pixel circuit PXC or the third transistor T3. That is, the first and second light emitting elements LD1 and LD2 may be driven by current and may have similar driving characteristics to light emitting diodes.

The pixel circuit PXC may control a current flowing from the first power source VDD to the second node N2 in response to the voltage of the first node N1. The pixel circuit PXC may include various known transistor connection relationships. For example, the pixel circuit PXC may include four or more transistors including the driving transistor.

A first electrode of the third transistor T3 may be connected to the first power source VDD, and a second electrode of the third transistor T3 may be connected to the second node N2. A gate electrode of the third transistor T3 may be connected to the first node N1. The third transistor T3 may control the amount of current flowing through the first and second light emitting elements LD1 and LD2 in response to the voltage of the first node N1.

A first electrode of the fourth transistor T4 may be connected to the data line DLj, and a second electrode of the fourth transistor T4 may be connected to the first node N1. A gate electrode of the fourth transistor T4 may be connected to the scan line SLi. The fourth transistor T4 may be turned on when the scan signal is supplied to the scan line SLi to transmit the data signal from the data line DLj to the first node N1.

The first transistor T1 may be connected between the sensing line SSLj and the second electrode (i.e., the second node N2) of the third transistor T3. The gate electrode of the first transistor T1 may be connected to the control line CLi. The first transistor T1 may be turned on when the first control signal is supplied to the control line CLi to electrically connect the sensing line SSLj and the second node N2 (i.e., the second electrode of the third transistor T3).

According to some example embodiments, when the first transistor T1 is turned on, the voltage of the initialization power supply Vint may be supplied to the second node N2. According to some example embodiments, when the first transistor T1 is turned on, a current generated by the third transistor T3 may be supplied to the sensing circuit 400.

The storage capacitor Cst may be connected between the first node N1 and the second node N2. The storage capacitor Cst may store a voltage corresponding to a voltage difference between the first node N1 and the second node N2.

According to some example embodiments, a first electrode of the second transistor T2 may be connected to the third node N3, and a second electrode of the second transistor T2 may be connected to the second power source VSS. The gate electrode of the second transistor T2 may be connected to the detection control line CCLi (or the first detection control line).

The second transistor T2 may be turned on when the second control signal is supplied to the detection control line CCLi to electrically connect the third node N3 and the second power source VSS. In other words, when the second transistor T2 is turned on, a bypass may be formed between the first light emitting element LD1 and the second power source VSS. The second transistor T2 may be used to detect (and check) the connection state of the first light emitting element LD1 between the second node N2 and the third node N3.

When the second light emitting element LD2 is normally connected, the second transistor T2 may maintain an off state during a display period for displaying an image.

However, when the second light emitting element LD2 is in a circuit-disconnected state between the third node N3 and the second power source VSS, the second transistor T2 may remain in a turned-on state for bypassing during the display period.

In the embodiment of the present invention, the structure of the pixel circuit PXC of the pixel 10 is not limited to the embodiment of fig. 3.

Fig. 4 is a timing chart showing an example of the operation of a display device including the pixel of fig. 3.

Fig. 4 shows an example of signals supplied to pixels arranged on the j-th vertical line (or pixel column).

Referring to fig. 1, 3, and 4, the display device 1000 may be driven by being divided into a display period DP for displaying an image and a sensing period SP for sensing characteristics of the third transistor T3 included in each of the pixels PX (refer to fig. 1).

According to some example embodiments, in the sensing period SP, the image data may be compensated based on the sensed characteristic information.

During the display period DP, the voltage of the initialization power Vint having a voltage level (e.g., a set or predetermined voltage level) may be supplied to the sensing lines SSL1 through SSLm. According to some example embodiments, the voltage of the initialization power supply Vint supplied during the display period DP may be set to a value higher than the voltage of the second power supply VSS.

During the display period DP, the scan driver 200 may sequentially supply scan signals to the scan lines SL1 to SLn. In addition, the scan driver 200 may sequentially supply control signals to the control lines CL1 to CLn during the display period DP.

According to some example embodiments, the length of the control signal supplied in the display period DP may be longer than the length of the scan signal. Further, a part of the control signal supplied to the ith control line CLi in the display period DP may overlap with the scan signal supplied to the ith scan line SLi.

When the fourth transistor T4 is turned on, a data signal corresponding to image data may be supplied to the first node N1. When the first transistor T1 is turned on, the initialization power Vint may be supplied to the second node N2. Accordingly, the storage capacitor Cst may store a voltage corresponding to a voltage difference between the data signal and the initialization power supply Vint.

Here, since the initialization power Vint is set to a constant voltage during the display period DP, the voltage stored in the storage capacitor Cst may be stably determined by the data signal.

When the supply of the scan signal and the control signal to the ith scan line SLi and the ith control line CLi is stopped, the first transistor T1 and the fourth transistor T4 may be turned off.

Thereafter, the third transistor T3 may control the amount of current (driving current) supplied to the first and second light emitting elements LD1 and LD2 in response to the voltage stored in the storage capacitor Cst. Accordingly, the first and second light emitting elements LD1 and LD2 may emit light having luminance corresponding to the driving current.

According to some example embodiments, the scan driver 200 may sequentially supply scan signals to the scan lines SL1 to SLn during the sensing period SP. Further, during the sensing period SP, the scan driver 200 may sequentially supply control signals to the control lines CL1 to CLn.

According to some example embodiments, the length of the control signal supplied in the sensing period SP may be longer than the length of the control signal supplied in the display period DP. Further, in the sensing period SP, a part of the control signal supplied to the ith control line CLi may overlap with the scan signal supplied to the ith scan line SLi.

When the scan signal and the control signal are simultaneously supplied, the first transistor T1 and the fourth transistor T4 are turned on. When the fourth transistor T4 is turned on, the sensing data signal SGV (or sensing data voltage) for sensing may be supplied to the first node N1 through the data line DLj. Meanwhile, when the first transistor T1 is turned on, the voltage of the initialization power Vint may be supplied to the second node N2. Accordingly, a voltage corresponding to a voltage difference between the sensing data signal SGV and the initialization power supply Vint may be stored in the storage capacitor Cst.

Thereafter, when the supply of the scan signal is stopped, the fourth transistor T4 may be turned off. When the fourth transistor T4 is turned off, the first node N1 may float. Accordingly, the voltage of the second node N2 may be raised, and a sensing current may be generated through the third transistor T3. During the voltage rise, a sense current may flow to the sense line SSLj. The sensing circuit 400 may compensate the image data by analyzing the sensing current.

According to some example embodiments, the sensing period SP may be performed at least once before the display apparatus 1000 is shipped. In this case, the initial characteristic information of the third transistor T3 may be stored before the display device 1000 is shipped from the factory, and the pixel unit 100 may display an image having a uniform image quality by compensating the input image data IDATA using the characteristic information.

In addition, even while the display apparatus 1000 is used, the sensing period SP may be performed every time period (e.g., every set or predetermined time period). For example, the sensing period SP may be arranged in a part of the time when the display apparatus 1000 is turned on and/or off. Then, even if the characteristic of the third transistor T3 of each of the pixels PX is changed according to the amount used, the characteristic information may be updated in real time to reflect the characteristic information in the generation of the data signal. However, this is an example, and the sensing period SP may be between the display periods (e.g., set or predetermined display periods) DP. Accordingly, the pixel unit 100 can continuously display images having uniform image quality.

Fig. 5 is a block diagram schematically showing an example of a configuration for illumination detection of the display device of fig. 1.

Referring to fig. 1, 3, and 5, when performing illumination detection of a pixel PX (refer to fig. 1), a pixel unit 100 included in a display apparatus 1000 may be controlled by an illumination tester 102.

According to some example embodiments, the lighting tester 102 may be connected to the pixel unit 100 when detecting the display device 1000 in a motherboard state. According to some example embodiments, when the display apparatus 1000 is used, the illumination tester 102 may be connected to the pixel unit 100 by a user command or the like.

The illumination tester 102 may be included in the display apparatus 1000 or may be connected to the pixel unit 100 from the outside of the display apparatus 1000. Optionally, some components of the lighting tester 102 may be included in the display device 1000.

Referring to fig. 3 and 5, the illumination tester 102 may be connected to the control lines CLi and the detection control lines CCLi of the pixels 10. In addition, the illumination tester 102 may be connected to the scan lines SLi and the sensing lines SSLj of the pixels 10.

The lighting tester 102 may supply a first control signal CS1 to the control line CLi and a second control signal CS2 to the detection control line CCLi. In addition, the lighting tester 102 may supply the voltage of the initialization power supply Vint to the sensing line SSLj and supply the scan signal to the scan line SLi. Therefore, illumination detection and connection failure detection for light emitting elements LD1 and LD2 can be performed.

According to some example embodiments, first, all of the pixels PX (refer to fig. 1) included in the pixel unit 100 may emit light. The illumination tester 102 may determine a pixel represented by a dark spot as a defective pixel through illumination detection that analyzes the luminance of the pixel PX (refer to fig. 1). For example, the illumination tester 102 may detect the luminance of each of the pixels PX (refer to fig. 1) using a camera. Alternatively, the illumination detection may also be performed to include analyzing an input/output value of a signal for detection, analyzing luminance and/or color coordinates of light emitted from the pixel PX (refer to fig. 1), and the like. Such illumination detection may be performed by various known methods.

Subsequently, driving for checking connection failure of light emitting elements (e.g., LD1 and LD2 shown in fig. 3) may be performed on the defective pixel indicated by the dark dot. That is, when at least one of the light emitting elements LD1 and LD2 connected in series is electrically disconnected or short-circuited, a pixel including the at least one light emitting element may be displayed darker than a normally connected pixel. After such a defective pixel is specified, at least one light emitting element, which is checked as a connection failure, among the light emitting elements LD1 and LD2 connected in series can be detected by using a bypass between the light emitting elements LD1 and LD 2.

A method and a pixel structure for detecting a connection failure of the light emitting elements LD1 and LD2 will be described in detail with reference to fig. 6A and the like.

Fig. 6A and 6B are timing charts for explaining a detection method of the display device.

Referring to fig. 3, 6A and 6B, the inspection method of the display apparatus may include a first period P1 for determining a defective pixel and a second period P2 for checking a connection failure of the first light emitting element LD1 and the second light emitting element LD 2.

In fig. 6A and 6B, the driving of the pixel 10 of fig. 3 will be mainly described, and the driving can also be applied to a plurality of pixels.

As shown in fig. 6A, in the first period P1, a scan signal of a gate-on level is supplied to the scan line SLi, and a first control signal of the gate-on level is supplied to the control line CLi. In the first period P1, the second control signal may not be supplied. For example, the second control signal of the gate-off level (e.g., denoted by L) may be supplied to the detection control line CCLi during the first period P1.

In addition, the initialization power Vint having the first voltage level V1 may be supplied through the sensing line SSLj. The initialization power Vint may be supplied to stably calculate the driving current generated by the third transistor T3 by maintaining the voltage of the second node N2 at a constant value.

According to some example embodiments, the first voltage level V1 may be higher than a voltage level of the second power source VSS. For example, the difference between the first voltage level V1 and the voltage level of the second power source VSS may be equal to or greater than the sum of the threshold voltage of the first light emitting element LD1 and the threshold voltage of the second light emitting element LD 2.

Since the operation of the pixel 10 in fig. 6A is substantially the same as that of the display period DP described with reference to fig. 4, some repetitive description may be omitted.

When a dark spot is generated in the pixel 10 or the luminance of the pixel 10 is lower than the luminance of the other pixels, an operation for checking the connection failure of the light emitting elements LD1 and LD2 of the pixel 10 may be performed during the second period P2.

In the second period P2, the supply of the scan signal to the scan line SLi may be stopped. For example, a scan signal of a gate-off level (e.g., represented by L) may be supplied. Accordingly, the fourth transistor T4 may remain in an off state in the second period P2.

In addition, in the second period P2, the first control signal may be supplied to the control line CLi, and the second control signal may be supplied to the detection control line CCLi. Accordingly, the first transistor T1 and the second transistor T2 may be turned on simultaneously. The initialization power Vint of the first voltage level V1 may be supplied to the sensing line SSLj.

Accordingly, in the second period P2, a current path connected from the sensing line SSLj to the second power source VSS through the second node N2, the first light emitting element LD1, the third node N3, and the second transistor T2 may be formed. When the first light emitting element LD1 is normally connected or aligned between the second node N2 and the third node N3, the first light emitting element LD1 may emit light due to a voltage difference between the first voltage level V1 of the initialization power Vint and the voltage level of the second power source VSS.

In other words, when the pixel 10 emits light, it can be determined that the connection of the first light emitting element LD1 is normal. At this time, since the pixel 10 is displayed darker than other pixels, it is possible to determine (or infer) that the connection of the second light emitting element LD2 is abnormal.

When the pixel 10 does not emit light in the second period P2, it may be determined that the connection of the first light emitting element LD1 is abnormal. For example, the first light emitting element LD1 may be electrically disconnected, or an unexpected short circuit may be generated between the second node N2 and the third node N3. The result of checking the connection failure of light emitting elements LD1 and LD2 may be stored in a memory or the like. For example, the coordinates of the defective pixel, the position of the light emitting element in which the connection failure has occurred, and the like may be recorded in a storage medium such as a memory at the same time as the second period P2 or after the second period P2.

The repair process, repair drive, bypass process, bypass drive, and the like may be additionally performed on the abnormally connected light emitting element in various known methods.

As described above, the display device 1000 (refer to fig. 1) including the pixel 10 and the driving method thereof according to the embodiment of the present invention may relatively accurately detect a light emitting element in which a connection failure has occurred using a transistor (e.g., the second transistor T2) connected between the light emitting elements LD1 and LD2 connected in series and a second control signal supplied to a detection control line for controlling the transistor. Therefore, repair or compensation driving can be easily performed later. Therefore, the reliability of the display device 1000 (refer to fig. 1) including the plurality of light emitting elements LD1 and LD2 connected in series can be improved.

Fig. 7 is a circuit diagram showing another example of a pixel included in the display device of fig. 1.

In fig. 7, the same reference numerals are used for the components described with reference to fig. 3, and some repetitive description of these components may be omitted. In addition, the pixel 11 of fig. 7 may have substantially the same or similar configuration as the pixel 10 of fig. 3 except for the connection of the second transistor T2.

Referring to fig. 7, the pixel 11 may include a plurality of light emitting elements LD1 and LD2, a first transistor T1, a second transistor T2, a third transistor T3 (driving transistor), a storage capacitor Cst, and a fourth transistor T4. The pixel 11 may be connected to a detection power supply line CHLj that supplies an illumination detection power supply Vcheck.

The light emitting elements LD1 and LD2 may include a first light emitting element LD1 and a second light emitting element LD2 connected in series.

According to some example embodiments, a first electrode of the second transistor T2 may be connected to the third node N3, and a second electrode of the second transistor T2 may be connected to the detection power supply line CHLj. The gate electrode of the second transistor T2 may be connected to the detection control line CCLi.

When checking the connection failure of the first light emitting element LD1, the voltage level of the illumination detection power supply Vcheck may be lower than the voltage level of the initialization power supply Vint, so that the first light emitting element LD1 emits light. In addition, the voltage level of the illumination detection power supply Vcheck may be equal to or less than the voltage level of the second power supply VSS, so that the second light emitting element LD2 does not emit light.

When the connection failure of the second light emitting element LD2 is checked, the voltage level of the illumination detection power supply Vcheck may be equal to or greater than the voltage level of the initialization power supply Vint, so that the first light emitting element LD1 does not emit light. In addition, the voltage level of the illumination detection power supply Vcheck may be larger than the voltage level of the second power supply VSS, so that the second light emitting element LD2 emits light.

Fig. 8 is a timing chart for explaining an example of a detection method of a display device including the pixel of fig. 7.

In fig. 8, the same reference numerals are used for the components described with reference to fig. 6B, and some repetitive description of these components may be omitted.

Referring to fig. 7 and 8, the detection method of the display apparatus may include a second period P2 for checking the connection failure of the first light emitting element LD1 and a third period P3 for checking the connection failure of the second light emitting element LD 2.

According to some example embodiments, the same signal may be supplied to the control line CLi and the detection control line CCLi. For example, a control signal output from one control signal source may be simultaneously supplied to the control line CLi and the detection control line CCLi. However, this is an example, and the method for supplying signals to the control line CLi and the detection control line CCLi is not limited thereto.

In the second period P2, the first transistor T1 and the second transistor T2 may be turned on in response to the first control signal supplied to the control line CLi and the second control signal supplied to the detection control line CCLi. At this time, the fourth transistor T4 may be turned off.

In the second period P2, the initialization power supply Vint may have the first voltage level V1, and the illumination detection power supply Vcheck may have the second voltage level V2. The first voltage level V1 may be set higher than the second voltage level V2 so that the first light emitting element LD1 emits light. In addition, the second voltage level V2 may be set to be lower than the voltage level of the second power source VSS, so that the second light emitting element LD2 does not emit light.

Accordingly, in the second period P2, a current path connected from the sensing line SSLj to the detection power supply line CHLj through the second node N2, the first light emitting element LD1, the third node N3, and the second transistor T2 may be formed.

When the pixel 11 emits light, it can be determined that the connection of the first light emitting element LD1 is normal. However, when the pixel 11 does not emit light, it may be determined that the connection of the first light emitting element LD1 is abnormal (short or open).

In the third period P3, the first transistor T1 and the second transistor T2 may be turned on in response to the first control signal supplied to the control line CLi and the second control signal supplied to the detection control line CCLi. At this time, the fourth transistor T4 may be turned off.

In the third period P3, the initialization power supply Vint may have the third voltage level V3, and the illumination detection power supply Vcheck may have the fourth voltage level V4. The fourth voltage level V4 may be set to a voltage level higher than the second power source VSS, so that the second light emitting element LD2 emits light. In addition, the third voltage level V3 may be set to be lower than or equal to the fourth voltage level V4 so that the first light emitting element LD1 does not emit light.

Accordingly, in the third period P3, a current path may be formed from the detection power supply line CHLj to the second power supply VSS through the third node N3 and the second light emitting element LD 2.

In the third period P3, when the pixel 11 emits light, it can be determined that the connection of the second light-emitting element LD2 is normal. However, when the pixel 11 does not emit light, it may be determined that the connection of the second light emitting element LD2 is abnormal (short or open).

In fig. 8, the second period P2 and the third period P3 are driven at intervals (e.g., set or predetermined intervals). However, only one of the second period P2 and the third period P3 may be driven in some cases.

As described above, the pixel 11 of fig. 7 and the detection method for driving the pixel 11 of fig. 8 can individually check (and detect) the connection failure (or conduction) of each of the first light emitting element LD1 and the second light emitting element LD 2. Therefore, the accuracy of detecting the light emitting element in which the connection failure has occurred can be further improved.

Fig. 9 is a timing chart for explaining another example of a detection method of a display device including the pixel of fig. 7.

In fig. 9, the same reference numerals are used for the components described with reference to fig. 8, and some repetitive description of these components may be omitted. In addition, the detection method of fig. 9 may be substantially the same as or similar to the detection method of fig. 8 except for the waveform of the first control signal supplied in the third period P3'.

Referring to fig. 7 and 9, the detection method of the display apparatus may include a second period P2 for checking the connection failure of the first light emitting element LD1 and a third period P3' for checking the connection failure of the second light emitting element LD 2.

In the third period P3', the first control signal may not be supplied to the control line CLi, and the first transistor T1 may be turned off. Whether or not the second light emitting element LD2 emits light may be detected in the third period P3'. Accordingly, the first transistor T1 may be turned off to reduce power consumption.

Fig. 10 is a circuit diagram showing another example of a pixel included in the display device of fig. 1.

In fig. 10, the same reference numerals are used for the components described with reference to fig. 7, and some repetitive description of these components may be omitted. In addition, the pixel 12 of fig. 10 may have substantially the same or similar configuration as the pixel 11 of fig. 7 except for the third light emitting element LD3 and the fifth transistor T5.

Referring to fig. 10, the pixel 12 may include a plurality of light emitting elements LD1, LD2, and LD3, a first transistor T1, a second transistor T2, a third transistor T3, a storage capacitor Cst, a fourth transistor T4, and a fifth transistor T5. The pixel 12 may be connected to a detection power line CHLj that supplies an illumination detection power supply Vcheck.

The third light emitting element LD3 may be electrically connected between the second light emitting element LD2 and the second power source VSS. That is, the first to third light emitting elements LD1, LD2, and LD3 may be connected in series.

A gate electrode of the second transistor T2 may be connected to the first detection control line CCL1 — i. The second control signal may be supplied to the first detection control line CCL1 — i.

A first electrode of the fifth transistor T5 may be connected to a fourth node N4 between the second light emitting element LD2 and the third light emitting element LD3, and a second electrode of the fifth transistor T5 may be connected to the second power source VSS. A gate electrode of the fifth transistor T5 may be connected to the second detection control line CCL2 — i. The third control signal may be supplied to the second detection control line CCL2 — i.

The fifth transistor T5 may be turned on when the third control signal is supplied to the second detection control line CCL2 — i to form a bypass between the fourth node N4 and the second power source VSS. The fifth transistor T5 may be used to detect (and check) the connection state of the third light emitting element LD 3.

The pixel 12 may further include at least one light emitting diode and at least one transistor corresponding thereto for forming a bypass, which are connected in series.

Fig. 11 is a timing chart for explaining an example of a detection method of a display device including the pixel of fig. 10.

In fig. 11, the same reference numerals are used for the components described with reference to fig. 6B and 8, and some repetitive description of these components may be omitted.

Referring to fig. 10 and 11, the detection method of the display apparatus may include a second period P2 for checking a connection failure of the first light emitting element LD1 and a third period P3 for checking a connection failure of the second light emitting element LD2 and the third light emitting element LD 3.

According to some example embodiments, a driving method for detection in the second period P2 is substantially the same as the driving method in the second period P2 described with reference to fig. 8 and 9, except for a configuration in which the fifth transistor T5 is turned off. For example, in the second period P2, the third control signal may not be supplied, and the fifth transistor T5 may be turned off. Since the second voltage level V2 of the voltage of the third node N3 (i.e., the illumination detection power supply Vcheck) is lower than the voltage level of the second power supply VSS, the connection failure of the first light emitting element LD1 can be checked.

In the second period P2, the first transistor T1 and the second transistor T2 may be turned on, and a current path connected from the sensing line SSLj to the detection power supply line CHLj through the second node N2, the first light emitting element LD1, the third node N3, and the second transistor T2 may be formed. Accordingly, it may be determined whether the first light emitting element LD1 is normally connected. Since the illumination detection power Vcheck of the second voltage level V2 lower than the voltage level of the second power source VSS is supplied to the third node N3, the second light emitting element LD2 and the third light emitting element LD3 may not emit light.

In the third period P3, the first transistor T1, the second transistor T2, and the fifth transistor T5 may be turned on in response to the first control signal supplied to the control line CLi, the second control signal supplied to the first detection control line CCL1_ i, and the third control signal supplied to the second detection control line CCL2_ i. In the third period P3, the initialization power supply Vint may have the third voltage level V3, and the illumination detection power supply Vcheck may have the fourth voltage level V4. Therefore, in the third period P3, a current path may be formed from the detection power supply line CHLj to the second power supply VSS through the second light emitting element LD2 and the fifth transistor T5.

The pixel 12 is a defective pixel, and after checking the normal connection of the first light emitting element LD1 in the second period P2, the third period P3 may be performed. When the pixel 12 emits light in the third period P3, it may be determined that the connection of the second light emitting element LD2 is normal and the connection of the third light emitting element LD3 is abnormal.

However, after the pixel is determined as the defective pixel, when the pixel 12 does not emit light in the third period P3, it may be determined that the connection of the second light emitting element LD2 is abnormal (short or open).

Fig. 12 is a timing chart for explaining another example of a detection method of a display device including the pixel of fig. 10.

In fig. 12, the same reference numerals are used for the components described with reference to fig. 11, and some repetitive description of these components may be omitted. In addition, the detection method of fig. 12 may be substantially the same as or similar to the detection method of fig. 11 except for the waveform of the third control signal supplied in the second period P2'.

Referring to fig. 10 and 12, the detection method of the display apparatus may include a second period P2' for checking the connection failure of the first light emitting element LD1 and a third period P3 for checking the connection failure of the second light emitting element LD 2.

In the second period P2', the third control signal may be supplied, and the first transistor T1, the second transistor T2, and the fifth transistor T5 may all be turned on. At this time, since the illumination detection power Vcheck of the second voltage level V2 lower than the voltage level of the second power source VSS is supplied to the third node N3, the second light emitting element LD2 and the third light emitting element LD3 may not emit light. In addition, a current path connected to the detection power supply line CHLj from the sensing line SSLj through the second node N2, the first light emitting element LD1, the third node N3, and the second transistor T2 may be formed. When the first light emitting element LD1 is normally connected, the first light emitting element LD1 may emit light.

Since the operation in the third period P3 is substantially the same as the operation in the third period P3 described with reference to fig. 11, some repetitive description may be omitted.

According to some example embodiments, the same signal (control signal) may be supplied to at least two of the control line CLi, the first detection control line CCL1_ i, and the second detection control line CCL2_ i.

Fig. 13 is a circuit diagram showing still another example of a pixel included in the display device of fig. 1.

In fig. 13, the same reference numerals are used for the components described with reference to fig. 10, and some repetitive description of these components may be omitted. In addition, the pixel 13 of fig. 13 may have substantially the same or similar configuration as the pixel 12 of fig. 10 except for the connection of the fifth transistor T5.

Referring to fig. 13, the pixel 13 may include a plurality of light emitting elements LD1, LD2, and LD3, a first transistor T1, a second transistor T2, a third transistor T3, a storage capacitor Cst, a fourth transistor T4, and a fifth transistor T5. The pixel 13 may be connected to a second detection power supply line CHL2_ j that supplies a second illumination detection power supply Vcheck2 (or an additional illumination detection power supply).

According to some example embodiments, the first electrode of the second transistor T2 may be connected to the third node N3. A second electrode of the second transistor T2 may be connected to the first detection power supply line CHL1_ j supplying the first illumination detection power supply Vcheck 1. A gate electrode of the second transistor T2 may be connected to a first detection control line CCL1_ i supplying a second control signal.

A first electrode of the fifth transistor T5 may be connected to the fourth node N4. A second electrode of the fifth transistor T5 may be connected to the second detection power supply line CHL2_ j. A gate electrode of the fifth transistor T5 may be connected to a second detection control line CCL2_ i supplying a third control signal. The fifth transistor T5 may be used to detect (and check) the connection state of the third light emitting element LD 3.

When checking the connection failure of the second light emitting element LD2, the voltage level of the first illumination detection power supply Vcheck1 may be equal to or higher than the voltage level of the initialization power supply Vint, so that the first light emitting element LD1 does not emit light. The voltage level of the first illumination detection power supply Vcheck1 may be greater than the voltage level of the second power supply VSS, so that the second light emitting element LD2 emits light. Further, the voltage level of the second illumination detection power supply Vcheck2 may be smaller than the voltage level of the second power supply VSS, so that the third light emitting element LD3 does not emit light.

When checking the connection failure of the third light emitting element LD3, the voltage level of the first illumination detection power supply Vcheck1 may be equal to or higher than the voltage level of the initialization power supply Vint, so that the first light emitting element LD1 does not emit light. The voltage level of the first illumination detection power supply Vcheck1 may be smaller than that of the second illumination detection power supply Vcheck2, so that the second light emitting element LD2 does not emit light. Further, the voltage level of the second illumination detection power supply Vcheck2 may be greater than the voltage level of the second power supply VSS, so that the third light emitting element LD3 emits light.

Fig. 14 is a timing chart for explaining an example of a detection method of a display device including the pixel of fig. 13.

In fig. 14, the same reference numerals are used for the components described with reference to fig. 6B, 8, and 11, and some repetitive description of these components may be omitted.

Referring to fig. 13 and 14, the detection method of the display apparatus may include a second period P2 for checking a connection failure of the first light emitting element LD1, a third period P3 for checking a connection failure of the second light emitting element LD2, and a fourth period P4 for checking a connection failure of the third light emitting element LD 3.

According to some example embodiments, the second illumination detection power supply Vcheck2 may have the second voltage level V2 in the second period P2 and the third period P3. Therefore, the third light emitting element LD3 does not emit light in the second period P2 and the third period P3.

In the fourth period P4, the initialization power Vint of the third voltage level V3 may be supplied to the sensing line SSLj, the first illumination detection power Vcheck1 of the fourth voltage level V4 may be supplied to the first detection power line CHL1_ j, and the second illumination detection power Vcheck2 of the fifth voltage level V5 higher than the fourth voltage level V4 may be supplied to the second detection power line CHL2_ j.

In the fourth period P4, the first transistor T1, the second transistor T2, and the fifth transistor T5 may all be turned on. Since the voltage of the third node N3 is higher than the voltage of the second node N2, the first light emitting element LD1 may be turned off. In addition, since the voltage of the fourth node N4 is higher than the voltage of the third node N3, the second light emitting element LD2 may be turned off.

Accordingly, in the fourth period P4, a current path may be formed from the second detection power supply line CHL2_ j to the second power supply VSS through the fifth transistor T5 and the third light emitting element LD 3.

In the fourth period P4, when the pixel 13 emits light, it can be determined that the connection of the third light emitting element LD3 is normal. However, when the pixel 13 does not emit light, it may be determined that the connection of the third light emitting element LD3 is abnormal (short or open).

Therefore, even when three or more light emitting elements are connected in series, the connection failure of each of the light emitting elements can be checked. In fig. 13, three light emitting elements are connected in series, but the embodiment according to the present invention is not limited thereto. Even when four or more light emitting elements are connected in series, the contents described with reference to fig. 10 to 14 can be applied, and a connection failure of each of the light emitting elements can be checked.

As described above, the display device and the detection method thereof according to the embodiment of the present invention can relatively accurately detect the connection failure of each of the light emitting elements using the transistors connected between the light emitting elements connected in series and the control signal supplied to the detection control line to control the transistors. Therefore, repair or compensation driving can be easily performed later. Therefore, the reliability and image quality of a display device including a plurality of light emitting elements connected in series can be improved.

Fig. 15 is a circuit diagram showing an example of a pixel included in the display device according to the embodiment of the present invention.

In fig. 15, the same reference numerals are used for the components described with reference to fig. 3, and some repetitive description of these components may be omitted. In addition, the pixel 14 of fig. 15 may have substantially the same or similar configuration as the pixel 10 of fig. 3, except for the configuration of the pixel circuit PXC 1.

Referring to fig. 15, the pixel 14 may include a pixel circuit PXC1, a first transistor T1, a second transistor T2, a first light emitting element LD1, and a second light emitting element LD 2.

According to some example embodiments, the pixel 14 may compensate for the threshold voltage of the third transistor T3 (driving transistor) through the pixel circuit PXC 1.

Since the connection and operation of the first transistor T1 and the second transistor T2 have already been described with reference to fig. 3 and the like, some repetitive description may be omitted.

The pixel circuit PXC1 may include third to eighth transistors T3 to T8.

The third transistor T3 (driving transistor) may control a current flowing from the first power source VDD to the second node N2 in response to the voltage of the first node N1.

The fourth transistor T4 may be connected between the data line DLj and the first electrode of the third transistor T3. A gate electrode of the fourth transistor T4 may be connected to the scan line SLi. The fourth transistor T4 may be turned on by a scan signal to transmit a data signal from the data line DLj to the first electrode of the third transistor T3.

The fifth transistor T5 may be connected between the first node N1 and the second node N2. A gate electrode of the fifth transistor T5 may be connected to the scan line SLi. The third transistor T3 may be diode-connected by turning on the fifth transistor T5. A voltage corresponding to a difference between the data signal and the threshold voltage of the third transistor T3 may be supplied to the second node N2.

The sixth transistor T6 may be connected between the first node N1 and a wiring to which the initialization power supply Vint is supplied. A gate electrode of the sixth transistor T6 may be connected to the control line CLi. When the sixth transistor T6 is turned on, the voltage of the initialization power supply Vint may be supplied to the first node N1. The seventh transistor T7 may be connected between the first power source VDD and the first electrode of the third transistor T3, and the eighth transistor T8 may be connected between the second node N2 and the first electrode of the first light emitting element LD 1. Gate electrodes of the seventh transistor T7 and the eighth transistor T8 may be connected to the emission control line ELi. When the seventh transistor T7 and the eighth transistor T8 are turned on, the first light emitting element LD1 and the second light emitting element LD2 may emit light based on the driving current.

As such, the pixel circuit PXC1 can be realized in various known structures or structures for causing the light emitting elements LD1 and LD2 to emit light.

The display device and the detection method thereof according to the embodiment of the present invention can relatively accurately detect the connection failure of each of the light emitting elements using the transistors connected between the light emitting elements connected in series and the control signal supplied to the detection control line to control the transistors. Therefore, repair or compensation driving can be easily performed later. Therefore, the reliability and image quality of a display device including a plurality of light emitting elements connected in series can be improved.

However, the effects and characteristics according to the embodiments of the present invention are not limited to the above-described effects, and various extensions may be made without departing from the spirit and scope of the present invention.

As described above, aspects of some example embodiments of the present invention have been described with reference to the accompanying drawings. However, it will be understood by those skilled in the art that various modifications and changes may be made to the exemplary embodiments according to the present invention without departing from the spirit and scope of the invention as set forth in the claims and their equivalents.