1. A method for controlling the light erasing voltage of a liquid crystal writing device is characterized by comprising the following steps:

controlling a voltage difference between the base layer and the conductive layer to be within a set voltage value range below an erase voltage of the liquid crystal;

then, all or a set part of the TFTs on the substrate layer are controlled to be in a critical state, and the TFTs are irradiated by light within a set intensity range to realize local erasing.

2. The method for controlling a light erasing voltage of a liquid crystal writing apparatus as claimed in claim 1, further comprising: and after the local erasing is finished, controlling the voltage difference between the substrate layer and the conductive layer to be within the set voltage value range.

3. The method for controlling a light erasing voltage of a liquid crystal writing apparatus as claimed in claim 1, further comprising: after the partial erasing is completed, the voltage difference between the substrate layer and the conductive layer is discharged to zero.

4. The method for controlling a light erasing voltage of a liquid crystal writing apparatus as claimed in claim 1, further comprising:

defining the process of the erasing device from entering the writing area to leaving the writing area as an erasing process;

in the process of one erasing, the local erasing is realized by adopting the control method of the light erasing voltage of the liquid crystal writing device of claim 1; and controlling the voltage difference between the substrate layer and the conductive layer to be within the set voltage range at set time intervals t, and then controlling all or a set part of the TFTs on the substrate layer to be in a critical state so as to realize local erasing again when receiving illumination within the set intensity range.

5. The method as claimed in claim 4, wherein in one erasing process, if the current position of the erasing device is compared with the position of the erasing device when the voltage difference between the substrate layer and the conductive layer is in the set voltage range last time, the shortest distance between the substrate layer and the conductive layer exceeds a set value S, the voltage difference between the substrate layer and the conductive layer is controlled to be in the set voltage range, and then all or a part of the set TFTs on the substrate layer are controlled to be in a critical state, so that when the light irradiation within the set intensity range is received, the local erasing is realized again.

6. The method for controlling the erasing voltage of the liquid crystal writing device under illumination as claimed in claim 4 or 5, wherein the voltage difference between the substrate layer and the conductive layer is discharged to zero at the end of the current erasing process.

7. The method according to claim 1, wherein the set voltage range is determined by the erase voltage of the liquid crystal, the capacitance between the base layer and the conductive layer, and the light conduction current.

8. An illumination erasing voltage control system of a liquid crystal writing apparatus, comprising:

the voltage control module is used for controlling the voltage difference between the substrate layer and the conductive layer to be within a set voltage value range below the erasing voltage of the liquid crystal;

and the local erasing module is used for controlling all or a set part of TFTs on the basal layer to be in a critical state, and realizing local erasing by utilizing illumination within a set intensity range.

9. A voltage driving controller, wherein the controller loads and executes the liquid crystal writing apparatus light erasing voltage control method according to claim 1.

10. A liquid crystal writing apparatus, comprising the voltage driving controller of claim 9, or a local erasing is realized by using the light erasing voltage control method of the liquid crystal writing apparatus of claim 1.

Background

The liquid crystal writing board on the market at present has the working principle that the bistable characteristic of liquid crystal is utilized to display and/or erase the writing content on the liquid crystal writing board. Taking cholesteric liquid crystal as an example, writing pressure tracks of the writing pen are recorded by changing the liquid crystal state at the pen point through pressure acting on the liquid crystal writing board, and then corresponding writing contents are displayed; the cholesteric liquid crystal structure is changed by applying an electric field, so that the writing track on the liquid crystal writing board disappears to realize erasing.

The invention patent of patent number CN112684618B discloses a technical scheme for realizing local erasing of a liquid crystal writing device by illumination, which comprises a conductive layer, a liquid crystal layer and a substrate layer sequentially arranged from top to bottom; a plurality of erasing units are arranged on the basal layer in an array mode, and each erasing unit is internally provided with an erasing electrode and a thin film field effect transistor TFT (TFT for short) connected with the erasing electrode; applying a set control voltage to the gate electrode of the TFT and applying a set input voltage to the source electrode of the TFT so that the TFT is in a critical cut-off state; applying a set voltage to the conductive layer; at this time, by applying light within a set intensity range to an area to be erased by an erasing device (hereinafter referred to as an eraser), the TFT in the area receiving the light can be turned on, so that a set voltage is input to the corresponding erasing electrode, and when the erasing voltage between the erasing electrode and the conductive layer reaches the erasing voltage of the liquid crystal, partial erasing can be realized.

In the scheme, each TFT position on the substrate layer is correspondingly provided with a TFT light-transmitting opening for receiving illumination irradiation; in combination with the change relation curve of the illumination time and the voltage difference between the basal layer and the liquid crystal layer in fig. 1, if the light-transmitting opening of the TFT is opened, the light flux irradiated on the TFT through the opening is small, the light conduction current is small, and further the voltage change between the basal layer and the liquid crystal layer is slow, the illumination is needed for a long time to enable the voltage difference between the set erasing electrode and the conductive layer to reach the erasing voltage of the liquid crystal, so that the erasing time is long, the writing erasing efficiency is reduced, and the user experience is poor.

On the other hand, due to the doping concentration of the TFT channel, if the doping concentration of the TFT channel is small, the photosensitivity of the TFT is deteriorated, so that the light conduction current is too small, and the time required for the local erase is affected.

When the storage capacitor on the TFT substrate is designed to be large, the voltage change is slow and the erase time is long.

Disclosure of Invention

Based on the method, the invention provides a method and a system for controlling the illumination erasing voltage of the liquid crystal writing device.

In order to achieve the above object, according to a first aspect of the present invention, there is provided a light erasing voltage control method of a liquid crystal writing device including sequentially disposing a conductive layer, a liquid crystal layer, and a base layer; a plurality of erasing units are arranged on the base layer in an array manner, and each erasing unit is internally provided with an erasing electrode and a thin film field effect transistor (TFT) connected with the erasing electrode;

the voltage control method comprises the following steps:

controlling a voltage difference between the base layer and the conductive layer to be within a set voltage value range below an erase voltage of the liquid crystal;

and then controlling all or part of the set TFT on the substrate layer to be in a critical state, and irradiating by using light in a set intensity range to enable the TFT to be conducted when receiving the light in the set intensity range, wherein the voltage difference between the corresponding erasing electrode and the conductive layer is loaded to the erasing voltage of the liquid crystal on the basis of the set voltage value range, so that local erasing is realized.

The critical state is to control voltages applied to the gate and source of the TFT such that the TFT is in an off state when it does not receive light within a set intensity range and can be turned on when it receives light within the set intensity range.

After the local erasing is finished, controlling the voltage difference between the substrate layer and the conductive layer to be within the set voltage value range; the next erasing is convenient; alternatively, the voltage difference between the base layer and the conductive layer is discharged to zero, preventing charge accumulation within the film.

According to a second aspect of the present invention, there is provided a light erasing voltage control system for a liquid crystal writing apparatus, comprising:

the voltage control module is used for controlling the voltage difference between the substrate layer and the conductive layer to be within a set voltage value range below the erasing voltage of the liquid crystal;

and the local erasing module is used for controlling all or a set part of TFTs on the basal layer to be in a critical state, and realizing local erasing by utilizing illumination within a set intensity range.

According to a third aspect of the present invention, there is provided a voltage driving controller that loads and executes the above-described liquid crystal writing apparatus light erasing voltage control method.

According to a fourth aspect of the present invention, there is provided a liquid crystal writing apparatus, comprising the above voltage driving controller, or implementing partial erasing by using the above control method of the light irradiation erasing voltage of the liquid crystal writing apparatus.

Compared with the prior art, the invention has the beneficial effects that:

(1) the invention, through pre-loading voltage between the basal layer and the liquid crystal layer, shortens the time required by the illumination conduction of the TFT, improves the speed of local erasing, and solves the problem that the light conduction current is small due to the small light-transmitting opening of the TFT, the too low doping concentration of the channel of the TFT or the too large storage capacitor, thereby prolonging the time required by the illumination erasing.

(2) In the invention, in the process of one-time erasing, the voltage difference between the substrate layer and the conductive layer is controlled to be within the set voltage range at set time intervals t, so that on one hand, the time required by the next local erasing is shortened, and the phenomenon of fading of the handwriting caused by strong ambient light is avoided; on the other hand, the interval time for rewriting after local erasing can be shortened, erasing while writing is realized, the writing efficiency is improved, and the writing experience of a user is improved.

Additional features and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention and together with the description serve to explain the invention and not to limit the invention.

FIG. 1 is a graph showing the variation of the illumination time and the voltage difference between the substrate layer and the liquid crystal layer;

FIG. 2 is a graph showing a relationship between the illumination time after the pre-applied voltage and the voltage difference between the substrate layer and the liquid crystal layer according to the embodiment of the present invention;

FIGS. 3(a) - (b) are schematic views of TFT connections in the embodiment of the present invention, respectively;

FIG. 4 is a diagram illustrating an example of voltage loading when pre-loading voltage is performed according to an embodiment of the present invention;

fig. 5 is an example of voltage loading when performing light erasing in the embodiment of the present invention.

Detailed Description

It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.

Example one

As described in the background art, when local erasing is performed by using light, the light conduction current is too small due to too small light-transmitting opening of the TFT, too low doping concentration of the TFT channel, or too large storage capacitance, so that the charging voltage between the substrate layer and the liquid crystal layer is small, and it takes a long time for the light to irradiate until the voltage difference between the erase electrode and the conductive layer reaches the erase voltage of the liquid crystal, so that the time required for local erasing is long, the writing and erasing efficiency is reduced, and the user experience is poor.

According to the embodiment of the invention, the invention discloses a method for controlling the illumination erasing voltage of a liquid crystal writing device, and the liquid crystal writing device based on the method comprises the following steps: the conductive layer, the bistable liquid crystal layer and the substrate layer are arranged from top to bottom in sequence. The conducting layer can be not divided, a plurality of erasing units are integrated on the base layer, the erasing units are arranged in an array mode, and each erasing unit is internally provided with an erasing electrode and a TFT connected with the erasing electrode; the turning on of the TFT can provide a voltage to an erase electrode connected thereto.

The method for controlling the light erasing voltage of the liquid crystal writing device in the embodiment specifically comprises the following processes:

firstly, controlling the voltage difference between the substrate layer and the conductive layer to be within a set voltage value range below the erasing voltage of the liquid crystal;

then, controlling all or a set part of the TFTs on the base layer to be in a critical state, turning on the TFTs when the TFTs receive light within a set intensity range, and allowing the voltage difference between the corresponding erasing electrode and the conductive layer to reach the erasing voltage V of the liquid crystal on the basis of the value of the precharge voltage_EThereby realizing the partial erase.

The critical state specifically refers to: respectively applying set voltages to a grid electrode and a source electrode of a TFT on a base layer of the liquid crystal writing device; the voltage enables the TFT to be in a cut-off state when the TFT does not receive illumination within a set intensity range; the LED lamp can be conducted after receiving illumination within a set intensity range; therefore, the voltage difference between the voltage loaded on the erasing electrode corresponding to the conducted TFT and the conducting layer reaches the local erasing voltage of the liquid crystal, and the local erasing is realized.

Referring to fig. 2, the present embodiment controls the voltage difference between the substrate layer and the conductive layer within a set voltage range (e.g., voltage V) below the erase voltage of the liquid crystal₀) On the basis, the voltage difference between the basal layer and the conducting layer is promoted, so that the time required from the illumination conduction of the TFT to the voltage difference between the basal layer and the conducting layer to reach the erasing voltage of the liquid crystal is greatly shortened, and the speed of local erasing is accelerated.

By comparing fig. 1 and 2, the voltage difference between the substrate layer and the conductive layer reaches the erase voltage V of the liquid crystal_EThe time required, it is evident that t0 < t1, is significantly shorter.

FIGS. 3(a) - (b) respectively show wiring diagrams of TFTs, and referring to FIG. 3(a), the first plate represents the erase electrode region on the base layer to which the TFTs are connected; the second plate represents a conductive layer; the drain electrode of the TFT can be also connected with a storage capacitor, the leading-out electrode wire of each storage capacitor is connected with the leading-out electrode wire of the conducting layer, and the TFT is switched on to charge the storage capacitors. In fig. 3(a), the storage capacitor C1 functions to prevent voltage abrupt change, but it is needless to say that the storage capacitor C1 may be realized by a distributed capacitance formed between the conductive layer and the underlying layer itself, and in this case, the storage capacitor C1 may be omitted, as shown in fig. 3 (b).

In this embodiment, the TFT is turned on by light irradiation, and a set voltage is input to the corresponding erasing electrode, so that a capacitor (a storage capacitor C1 or a distributed capacitor) between the erasing electrode and the conductive layer is charged, and when a voltage difference between two ends of the capacitor reaches an erasing voltage of the liquid crystal, local erasing in the region can be achieved.

Specifically, firstly, applying set voltages to a grid electrode and a source electrode of the TFT respectively to enable all or set parts of the TFT on the substrate layer to be conducted, and applying set first voltages to corresponding erasing electrodes; applying a set second voltage to the conductive layer; thereby, a voltage difference between the base layer and the conductive layer is loaded to a set voltage range smaller than an erase voltage of the liquid crystal; since this voltage range is smaller than the erase voltage of the liquid crystal, the partial erase cannot be realized at this time.

The set voltage value range is determined by the erase voltage of the liquid crystal, the capacitance between the base layer and the conductive layer, and the photoconductive current; the setting can be performed according to actual needs.

Then, all the TFTs on the base layer are loaded to a critical state, a set third voltage value is applied to the conducting layer, so that when illumination within a set illumination intensity range is received, the TFTs can be conducted, and the voltage difference between the corresponding erasing electrodes and the conducting layer can reach the erasing voltage of the liquid crystal, and local erasing is achieved.

As a specific embodiment, taking the TFT structure shown in fig. 3(b) as an example, referring to fig. 4 and 5, first, a voltage of 20V is applied to the gate (G), a voltage of 12V is applied to the source (S), and a voltage of 23V is applied to the conductive layer of all or a set portion of the TFTs on the base layer; at this time, the TFT is turned on, and the voltage applied to the corresponding erase electrode (first plate) is 12V, and at this time, the absolute value of the voltage difference between the first plate and the second plate is 11V, which is smaller than the erase voltage of the liquid crystal, and thus, the partial erase cannot be performed.

Then, a voltage of-6V is applied to the gate (G) of all or a set part of the TFTs on the base layer, a voltage of 0V is applied to the source, and a voltage of 23V is applied to the conductive layer; at this time, the TFT is in a critical state, the TFT receiving the set intensity of illumination can be turned on, and the drain voltage changes from 12V to zero.

Therefore, after the voltage is pre-loaded, when the local erasing is realized by illumination conduction, the voltage difference between the first polar plate and the second polar plate is increased from 11V charging to 23V; if the voltage is not pre-loaded, the voltage difference between the first polar plate and the second polar plate needs to be charged from zero to 23V; obviously, the time required for realizing the light erasing after the precharge is performed becomes short.

As an optional implementation manner, after the partial erasing is completed, the voltage difference between the base layer and the conductive layer is reloaded to the set voltage range, so that the capacitor between the base layer and the conductive layer can be charged from the voltage range when the partial erasing is performed next time; of course, the voltage difference between the base layer and the conductive layer may also be discharged to zero.

As a more specific embodiment, since the set erasing electric field is applied between the base layer and the conductive layer corresponding to the just erased area, these areas cannot be written again before the electric field is removed, which greatly affects the writing efficiency and writing experience.

Based on this, the present embodiment designs a local erase control method, which specifically includes the following processes:

defining the process of the erasing device from entering the writing area to leaving the writing area as an erasing process;

in the process of one-time erasing, the local erasing is realized by adopting the control method of the illumination erasing voltage of the liquid crystal writing device; and controlling the voltage difference between the substrate layer and the conductive layer to be within the set voltage range at set time intervals t, and then controlling all or a set part of the TFTs on the substrate layer to be in a critical state so as to realize local erasing again when receiving illumination within the set intensity range.

Meanwhile, the method can also comprise the following steps: in the process of one-time erasing, if the current position of the erasing device is compared with the position of the erasing device when the voltage difference between the base layer and the conducting layer is in the set voltage range last time, the shortest distance between the base layer and the conducting layer exceeds a set value S, the voltage difference between the base layer and the conducting layer is controlled to be in the set voltage range, then all or a set part of TFTs on the base layer are controlled to be in a critical state, and when illumination within the set intensity range is received, local erasing is achieved again.

And when the erasing process is finished, discharging the voltage difference between the substrate layer and the conductive layer to zero.

In the erasing process, the voltage difference between the base layer and the conducting layer is controlled to the set voltage range every set time t, on one hand, the time required by next local erasing is shortened, on the other hand, the interval time for rewriting after local erasing can be shortened, the writing can be realized while erasing, the writing efficiency is improved, and the writing experience of a user is improved.

Example two

According to an embodiment of the present invention, an embodiment of a system for controlling a light erasing voltage of a liquid crystal writing device is disclosed, which specifically comprises:

the voltage control module is used for controlling the voltage difference between the substrate layer and the conductive layer to be within a set voltage value range below the erasing voltage of the liquid crystal;

and the local erasing module is used for controlling all or a set part of TFTs on the basal layer to be in a critical state, and realizing local erasing by utilizing illumination within a set intensity range.

It should be noted that, the specific implementation of each module described above has been described in detail in the first embodiment, and is not described in detail here.

EXAMPLE III

According to an embodiment of the invention, a voltage driving controller is disclosed, which loads and executes the method for controlling the light erasing voltage of the liquid crystal writing device in the first embodiment.

Example four

According to the embodiment of the invention, the invention discloses a liquid crystal writing device, which adopts the method for controlling the illumination erasing voltage of the liquid crystal writing device in the first embodiment to realize local erasing.

Alternatively, the voltage drive controller described in the third embodiment is included.

The liquid crystal writing device in this embodiment may be a liquid crystal writing board, a liquid crystal blackboard, a liquid crystal drawing board, or other specific products. Such as: the optical energy writing board, the optical energy liquid crystal writing board, the optical energy large liquid crystal writing blackboard, the optical energy dust-free writing board, the optical energy portable blackboard, the electronic drawing board, the lcd electronic writing board, the electronic note book, the doodle board, the children writing board, the children doodle drawing board, the rubber function sketch board, the liquid crystal electronic drawing board or the color liquid crystal writing board, etc. which are currently known in the market, or other related products which can be known by the technicians in the field.

Although the embodiments of the present invention have been described with reference to the accompanying drawings, it is not intended to limit the scope of the present invention, and it should be understood by those skilled in the art that various modifications and variations can be made without inventive efforts by those skilled in the art based on the technical solution of the present invention.