1. A current source circuit is characterized by comprising a starting circuit, a current mirror circuit and a constant-temperature current generating circuit, wherein the input end of the starting circuit is connected with a turn-off control signal PD of a current source, the output end of the starting circuit is respectively connected with the current mirror circuit and the constant-temperature current generating circuit, the current mirror circuit is connected with the constant-temperature current generating circuit and divides voltage, and the current mirror circuit outputs bias current; the starting circuit comprises an MOS tube M5 and a capacitor C, the grid electrode of the MOS tube M5 is connected with a turn-off control signal PD of a current source, and the common ends of the MOS tube M5 and the capacitor C are respectively connected with the current mirror circuit and the constant-temperature current generating circuit.

2. The current source circuit according to claim 1, wherein the MOS transistor M5 is an NMOS transistor.

3. The current source circuit according to claim 1, wherein the constant temperature current generating circuit comprises a MOS transistor M1, a MOS transistor M2, a MOS transistor M3, a MOS transistor M4, a resistor R1 and a resistor R2, a gate of the MOS transistor M1 is connected to a gate of the MOS transistor M2, a gate of the MOS transistor M3 is connected to a gate of the MOS transistor M4, a gate of the MOS transistor M3 is connected to a gate of the MOS transistor M1, a gate of the MOS transistor M4 is connected to a gate of the MOS transistor M2, one end of the resistor R1 is connected to the MOS transistor M2, the other end of the resistor R2 is grounded, and one end of the resistor R2 is connected to a common end of the MOS transistor M4 and the MOS transistor M2, and the other end of the resistor R36.

4. The current source circuit according to claim 3, wherein the MOS transistor M1, the MOS transistor M2, the MOS transistor M3 and the MOS transistor M4 are NMOS transistors.

5. The current source circuit according to claim 3, wherein the width-to-length ratio of the MOS transistor M2 is set multiple times of that of the MOS transistor M1, and the width-to-length ratios of the MOS transistor M3 and the MOS transistor M4 are equal.

6. The current source circuit according to claim 1, wherein the current mirror circuit comprises a MOS transistor M6, a MOS transistor M7, a MOS transistor M8, a MOS transistor M9, a MOS transistor M10, a MOS transistor M11, a MOS transistor M8 and a MOS transistor M6 which are sequentially connected, a MOS transistor M9 and a MOS transistor M7 which are sequentially connected, a MOS transistor M10 and a MOS transistor M11 which are sequentially connected, gates of the MOS transistor M8, the MOS transistor M9 and the MOS transistor M10 which are connected, gates of the MOS transistor M6, the MOS transistor M7 and the MOS transistor M11 which are connected, and a MOS transistor M6 and a MOS transistor M7 which are respectively connected with the constant temperature current generating circuit.

7. The current source circuit according to claim 6, wherein the MOS transistor M6, the MOS transistor M7, the MOS transistor M8, the MOS transistor M9, the MOS transistor M10 and the MOS transistor M11 are PMOS transistors.

8. The current source circuit of claim 6, wherein the width-to-length ratios of MOS transistor M6 and MOS transistor M7 are equal, the width-to-length ratios of MOS transistor M8 and MOS transistor M9 are equal, the width-to-length ratio of MOS transistor M11 is equal to MOS transistor M6 and equal to MOS transistor M7 times, the width-to-length ratio of MOS transistor M10 is equal to MOS transistor M8 and equal to MOS transistor M9 times, and P is a positive integer.

Background

The current source is an essential circuit unit in the integrated circuit, the performance and the area of the current source are critical, a traditional small-area current source circuit is shown in fig. 1, a core circuit is mainly composed of NMOS transistors M1 and M2, PMOS transistors M3, M4, M5 and a resistor R, and a starting circuit is omitted in the circuit for convenience of description. Wherein the width-length ratio of M2 is K times of M1, and the width-length ratios of M3 and M4 are equal. The width-to-length ratio of M5 is P times that of M3 and M4, and the expression of the bias current Iref generated in fig. 1 is as follows:

wherein mu_N、c_oxRespectively, the carrier mobility of NMOS field effect transistor, the unit area capacitance of gate oxide, due to mu_NIs a process parameter with a trend opposite to that of the temperature, so the above formula is a positive temperature curve. Practical verification proves that due to the process deviation of the CMOS device and the resistor, when the temperature and the voltage change, the bias current Iref has the deviation of +/-100 percent or even more, so that the power consumption change range of the practical circuit is large, and the power consumption management and the circuit design are not facilitated.

In order to manage power consumption, a current source with small current variation with temperature needs to be designed, a BJT device is often used in a conventional design, and the BJT device needs to occupy a larger circuit area, so that a current source circuit needs to be provided to satisfy the characteristics of small area and small current variation with temperature.

Disclosure of Invention

In view of the defects in the prior art, an object of the present invention is to provide a current source circuit that satisfies the characteristics of small area and small current variation with temperature.

In order to achieve the purpose, the invention adopts the following specific technical scheme:

a current source circuit comprises a starting circuit, a current mirror circuit and a constant-temperature current generating circuit, wherein the input end of the starting circuit is connected with a turn-off control signal PD of a current source, the output end of the starting circuit is respectively connected with the current mirror circuit and the constant-temperature current generating circuit, the current mirror circuit is connected with the constant-temperature current generating circuit and divides voltage, and the current mirror circuit outputs bias current; the starting circuit comprises an MOS tube M5 and a capacitor C, the grid electrode of the MOS tube M5 is connected with a turn-off control signal PD of a current source, and the common ends of the MOS tube M5 and the capacitor C are respectively connected with the current mirror circuit and the constant-temperature current generating circuit.

Preferably, the MOS transistor M5 is an NMOS transistor.

Preferably, the constant-temperature current generating circuit includes a MOS transistor M1, a MOS transistor M2, a MOS transistor M3, a MOS transistor M4, a resistor R1 and a resistor R2, the gate of the MOS transistor M1 is connected with the gate of the MOS transistor M2, the gate of the MOS transistor M3 is connected with the gate of the MOS transistor M4, the MOS transistor M3 is connected with the MOS transistor M1, the MOS transistor M4 is connected with the MOS transistor M2, one end of the resistor R1 is connected with the MOS transistor M2, the other end of the resistor R3683 is grounded, one end of the resistor R2 is connected with the common end of the MOS transistor M4 and the common end of the MOS transistor M2, and the other end of the resistor R2 is grounded.

Preferably, the MOS transistor M1, the MOS transistor M2, the MOS transistor M3, and the MOS transistor M4 are NMOS transistors.

Preferably, the width-to-length ratio of the MOS transistor M2 is set to be twice of that of the MOS transistor M1, and the width-to-length ratios of the MOS transistor M3 and the MOS transistor M4 are equal.

Preferably, the current mirror circuit includes a MOS transistor M6, a MOS transistor M7, a MOS transistor M8, a MOS transistor M9, a MOS transistor M10, a MOS transistor M11, a MOS transistor M8 and a MOS transistor M6, the MOS transistor M9 and the MOS transistor M7 are sequentially connected, the MOS transistor M10 and the MOS transistor M11 are sequentially connected, gates of the MOS transistor M8, the MOS transistor M9 and the MOS transistor M10 are connected, gates of the MOS transistor M6, the MOS transistor M7 and the MOS transistor M11 are connected, and the MOS transistor M6 and the MOS transistor M7 are respectively connected to the constant-temperature current generating circuit.

Preferably, the MOS transistor M6, the MOS transistor M7, the MOS transistor M8, the MOS transistor M9, the MOS transistor M10, and the MOS transistor M11 are PMOS transistors.

Preferably, the width-to-length ratio of the MOS transistor M6 to the MOS transistor M7 is equal, the width-to-length ratio of the MOS transistor M8 to the MOS transistor M9 is equal, the width-to-length ratio of the MOS transistor M11 is P times of the MOS transistors M6 and M7, the width-to-length ratio of the MOS transistor M10 is P times of the MOS transistors M8 and M9, and P is a positive integer.

The invention has the beneficial effects that: the current source circuit is simple in structure, does not need a BJT device, occupies a small area, and after the circuit is started, the capacitor is not communicated with direct current and has no power consumption, so that the current source circuit with 0 power consumption of starting current, small occupied area and constant current is realized.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a circuit schematic of a prior art small area current source circuit;

fig. 2 is a circuit schematic of a current source circuit of the present invention.

In the figure, 1-starting circuit, 2-current mirror circuit and 3-constant temperature current generating circuit

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Other embodiments, which can be derived by one of ordinary skill in the art from the embodiments given herein without any creative effort, shall fall within the protection scope of the present invention.

In the description of the present invention, it should be noted that the terms "vertical", "upper", "lower", "horizontal", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of describing the present invention and simplifying the description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.

In the description of the present invention, it should also be noted that, unless otherwise explicitly specified or limited, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly and may, for example, be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

As shown in fig. 2, the present invention provides a current source circuit, which includes a start circuit 1, a current mirror circuit 2, and a constant-temperature current generating circuit 3, wherein an input end of the start circuit 1 is connected to a turn-off control signal PD of a current source, an output end of the start circuit is connected to the current mirror circuit 2 and the constant-temperature current generating circuit 3, the current mirror circuit 2 is connected to the constant-temperature current generating circuit 3 and divides a voltage, and the current mirror circuit outputs a bias current; the starting circuit comprises an MOS tube M5 and a capacitor C, the grid electrode of the MOS tube M5 is connected with a turn-off control signal PD of a current source, and the common ends of the MOS tube M5 and the capacitor C are respectively connected with the current mirror circuit and the constant-temperature current generating circuit. The MOS transistor M5 is an NMOS transistor.

Preferably, the constant-temperature current generating circuit includes a MOS transistor M1, a MOS transistor M2, a MOS transistor M3, a MOS transistor M4, a resistor R1 and a resistor R2, the gate of the MOS transistor M1 is connected with the gate of the MOS transistor M2, the gate of the MOS transistor M3 is connected with the gate of the MOS transistor M4, the MOS transistor M3 is connected with the MOS transistor M1, the MOS transistor M4 is connected with the MOS transistor M2, one end of the resistor R1 is connected with the MOS transistor M2, the other end of the resistor R3683 is grounded, one end of the resistor R2 is connected with the common end of the MOS transistor M4 and the common end of the MOS transistor M2, and the other end of the resistor R2 is grounded. And the MOS tube M1, the MOS tube M2, the MOS tube M3 and the MOS tube M4 are NMOS tubes. The width-to-length ratio of the MOS transistor M2 is set to be (K is a set positive integer) times of that of the MOS transistor M1, and the width-to-length ratios of the MOS transistor M3 and the MOS transistor M4 are equal.

Preferably, the current mirror circuit includes a MOS transistor M6, a MOS transistor M7, a MOS transistor M8, a MOS transistor M9, a MOS transistor M10, a MOS transistor M11, a MOS transistor M8 and a MOS transistor M6, the MOS transistor M9 and the MOS transistor M7 are sequentially connected, the MOS transistor M10 and the MOS transistor M11 are sequentially connected, gates of the MOS transistor M8, the MOS transistor M9 and the MOS transistor M10 are connected, gates of the MOS transistor M6, the MOS transistor M7 and the MOS transistor M11 are connected, and the MOS transistor M6 and the MOS transistor M7 are respectively connected to the constant-temperature current generating circuit. And the MOS tube M6, the MOS tube M7, the MOS tube M8, the MOS tube M9, the MOS tube M10 and the MOS tube M11 are PMOS tubes. The width-length ratio of the MOS transistor M6 to the MOS transistor M7 is equal, the width-length ratio of the MOS transistor M8 to the MOS transistor M9 is equal, the width-length ratio of the MOS transistor M11 is equal to the width-length ratio of the MOS transistor M6 and P times of the MOS transistor M7, the width-length ratio of the MOS transistor M10 is equal to the width-length ratio of the MOS transistor M8 and P times of the MOS transistor M9, and P is a set positive integer. Bias current I_REF＝P×I₀。

The working principle of the invention is as follows:

since the width-to-length ratios of M6 and M7 are equal, the width-to-length ratios of M8 and M9 are equal, and thus M6, M8 branch 1: 1 mirrors the M7, M9 branch current, therefore I₁＝I₂. With respect to the constant-temperature current generation circuit,

V_A+V_GS3＝V_GS4+V_B

since the width-to-length ratios of M3 and M4 are equal, and I₁＝I₂So that the voltage V_A＝V_BAnd due to

V_GS1＝V_GS2+I₃*R1

Then current I₁

In the above formula due to_NThe first term of the equation generates a current with a positive temperature curve, the NOMS is connected with the grid and the drain, so that the M1 tube is in a diode connection mode, the voltage of a diode decreases with the increase of the temperature, the second term of the equation is a negative temperature curve, and through proper parameter adjustment and the positive and negative temperature coefficient currents, a bias current close to zero temperature coefficient can be designed, so that the bias current is close to zero temperature coefficient

For the start-up circuit, when PD is high AVD, the NMOS transistor M5 is conducted to ground and the voltage V_EWhen the voltage is equal to 0, the gates of M8 and M9 are pulled to the ground, so that the circuits are in an on state, the gates of M6 and M7 are at PD high level voltage AVD, and are in an off state, and M6 and M7 are in a high impedance state, so that the whole circuits are turned off. When the circuit normally works, the PD is switched to 0 level from AVD, so that M6 and M7 work in a conducting switch state and are equivalent to a weak cascode tube, and the precision of the mirror image circuit is improved. At this time, M8, M6, M3 and M1 establish a current path, so that V_C，V_AHas a firstThe voltage is started, thereby turning on M4, M2, at which time start-up begins. Since the gate of M5 is switched to 0 level, M5 becomes high impedance, and the power supply AVD charges the point E through the capacitor C, so that the voltage V_EGradually rising, the gates of M8 and M9 gradually rising, and when the circuit is balanced, no change is made, and the circuit start is finished. After the start-up is finished, the start-up circuit does not consume any power because M5 is high impedance and the capacitor is different from direct current.

The invention has the beneficial effects that: the current source circuit is simple in structure, does not need a BJT device, occupies a small area, and after the circuit is started, the capacitor is not communicated with direct current and has no power consumption, so that the current source circuit with 0 power consumption of starting current, small occupied area and constant current is realized.

In light of the foregoing description of the preferred embodiments of the present invention, those skilled in the art can now make various alterations and modifications without departing from the scope of the invention. The technical scope of the present invention is not limited to the contents of the specification, and must be determined according to the scope of the claims.